
Andrew Brown Contact and Biography Research and Projects Publications Search People		Andrew Brown: Research and Projects Research Interests SpiNNaker - a precis: The human brain remains as one of the great frontiers of science – how does this organ upon which we all depend so critically, actually do its job? A great deal is known about the underlying technology – the neuron – and we can observe in vivo brain activity on a number of scales through techniques such as magnetic resonance imaging, neural staining and invasive probing, but this knowledge - a tiny fraction of the information that is actually there - barely starts to tell us how the brain works, from a perspective that we can understand and manipulate. Something is happening at the intermediate levels of processing that we have yet to begin to understand, and the essence of the brain's information processing function probably lies in these intermediate levels. One way to get at these middle layers is to build models of very large systems of spiking neurons, with structures inspired by the increasingly detailed findings of neuroscience, in order to investigate the emergent behaviours, adaptability and fault-tolerance of those systems. What has changed, and why could we not do this ten years ago? Multi-core processors are now established as the way forward on the desktop, and highly-parallel systems have been the norm for high-performance computing for a considerable time. In a surprisingly short space of time, industry has abandoned the exploitation of Moore’s Law through ever more complex uniprocessors, and is embracing a 'new' Moore's Law: the number of processor cores on a chip will double roughly every 18 months. If projected over the next 25 years this leads inevitably to the landmark of a million-core processor system. Why wait? We are building a system containing a million ARM9 cores - not dissimilar to the processor found in many mobile phones. Whilst this is not, in any sense, a powerful core, it possesses aspects that make it ideal for an assembly of the type we are undertaking. With a million cores, we estimate we can sensibly simulate - in real time - the behaviour of a billion neurons. Whilst this is less than 1% of a human brain, in the taxonomy of brain sizes it is certainly not a primitive system, and it should be capable of displaying interesting behaviour. A number of design axioms of the architecture are radically different to those of conventional computer systems - some would say they are downright heretical. The architecture turns out to be elegantly suited to a surprising number of application arenas, but the flagship application is neural simulation; neurobiology inspired the design. This biological inspiration draws us to two parallel, synergistic directions of enquiry; significant progress in either direction will represent a major scientific breakthrough: · How can massively parallel computing resources accelerate our understanding of brain function? · How can our growing understanding of brain function point the way to more efficient parallel, fault-tolerant computation? Technical challenges SpiNNaker is not just another large computing system. It incorporates - at a fundamental level - a number of unorthodox design paradigms. It is designed primarily to simulate large aggregates of neurons (a billion). To do this, a million cores are interconnected by a novel communication infrastructure - details are in the publications and the SpiNNaker website. This involves distributing the topology of the network to be simulated throughout the topology of the processor network itself. The sheer size of both the simulating and simulated networks means that any central overseer - in almost any capacity - is not really feasible, and pretty much every aspect of the whole simulation ensemble has to be self-assembling. Factoring in the estimated mean time between failures intrinsic to extremely large systems compounds the technical challenges, because the simulating system has to be able to modulate its behaviour - on the fly - in the light of component and communication failures whilst a simulation is in progress. Current Projects (in our database) Otoacoustic Emission Based Biometric Systems RF time-of-flight ranging for WSNs RF-based time-of-flight locationing system SpiNNaker Previous Projects (in our database) Cryptographic Synthesis Integrating Renewable Energy Sources into a Domestic Environment Potential PhD Projects (in our database) Cryptographic synthesis Full Exception Handling in a Synthesis Environment MIDAS on a Chip Neural Simulator Synthesizable File I/O Seminars Given and Upcoming Processing with a Million Cores (Wednesday 25th January, 2012) Grants G1: Three‑dimensional reconstruction as an aid to computer modelling of the electrical properties of neurones in the brain 1985-1986. (With the Department of Neurophysiology). A.D. Brown and H. Wheal G2: Three‑dimensional reconstruction as an aid to computer modelling of the electrical properties of neurones in the brain: IBM Winchester postdoctoral fellowship, 1986-1989 (With the Department of Neurophysiology). H. Wheal and A.D. Brown G3: Research in mixed-mode circuit/logic level simulation: ALVEY/CAD042/TASK 6, EPSRC GR/F36453, 1989-1990. K.G. Nichols, A.D. Brown, M. Zwolinski and T.K. Kazmierski G4: A hardware acceleration system for mixed-mode simulation: IEATP project IED2/1/1755, EPSRC GR/H51804, 1990-1992 (With the University of Manchester.) K.G. Nichols, A.D. Brown, M. Zwolinski and T.J. Kazmierski G5: Circuit Level Accuracy System Simulation (CLASS): IEATP project IED2/475/30/04, EPSRC GR/H51804, 1992-1995. K.G. Nichols, A.D. Brown, M. Zwolinski and T.J. Kazmierski G6: Application Specific Synthesis Enforcing Testability (ASSET): ITD2/475/30/18, EPSRC GR/H51750/01, 1992-1995. K.G. Nichols, A.D. Brown and A.J. Currie G7: Asynchronous dead area test for synthesized ASICS: EPSRC GR/K00752, 1995-1996. A.D. Brown, M. Zwolinski and B.R. Wilkins G8: Novel test methodologies for mixed signal systems: EPSRC GR/J84120/01, 1994-1997. M. Zwolinski, A.D. Brown and B.R. Wilkins G9: High level behavioural synthesis for low power ASICS: EPSRC GR/K70748, 1996-1999. A.D. Brown and M. Zwolinski G10: High level floating point synthesis library: EPSRC GR/L28494, 1996-1999. A.D. Brown G11: Novel algorithms for analogue fault simulation: EPSRC GR/L35829, 1997-2001. M. Zwolinski, A.D. Brown and B.R. Wilkins G12: Self powered microsystems: EPSRC GR/M35086, 1999-2002. N.M. White, J.N. Ross, A.D. Brown and J.D. Turner G13: Low-Power Built-in-Self-Test: EPSRC GR/S05557, 2003-2006 B.M Al-Hashimi, A.D. Brown, M. Zwolinski G14: Royal Society Industrial Fellowship: Royal Society: LME Design Automation, 2001-2003 A.D. Brown G15: System-on-chip design methods and tools (Platform grant): EPSRC GR/595770/01, 2004-2007 B.M. Al-Hashimi, A.D. Brown, M. Zwolinski and P.R. Wilson G16: A scalable chip multiprocessor for large scale neural simulation: EPSRC EP/D079594/1, 2006-2009 A.D. Brown, M.Zwolinski, N.R. Shadbolt and P.R.Wilson G17: Network: Developing a common vision for UK research in microelectronic design: EPSRC EP/D054028/1, 2006-2007 A.D Brown, S.B. Furber and R. Woods G18: MIDAS on a chip: Ringfenced EPSRC DTA award, 2006-2009 A.D. Brown and C.N. Mitchell G19: Biologically inspired massively parallel architectures: EPSRC .EP/G015775/1, 2009-2014 A.D. Brown, J.E. Chad, J.S. Reeve and P.R. Wilson, G20: Network: eFutures : EPSRC A.D. Brown G21: Erasmus Mundus: EU P.R. Wilson and A.D. Brown G22: Network: eFuturesXD: EPSRC A.D. Brown

Andrew Brown: Research and Projects

Research Interests

SpiNNaker - a precis:

The human brain remains as one of the great frontiers of science – how does this organ upon which we all depend so critically, actually do its job? A great deal is known about the underlying technology – the neuron – and we can observe in vivo brain activity on a number of scales through techniques such as magnetic resonance imaging, neural staining and invasive probing, but this knowledge - a tiny fraction of the information that is actually there - barely starts to tell us how the brain works, from a perspective that we can understand and manipulate. Something is happening at the intermediate levels of processing that we have yet to begin to understand, and the essence of the brain's information processing function probably lies in these intermediate levels. One way to get at these middle layers is to build models of very large systems of spiking neurons, with structures inspired by the increasingly detailed findings of neuroscience, in order to investigate the emergent behaviours, adaptability and fault-tolerance of those systems.

What has changed, and why could we not do this ten years ago? Multi-core processors are now established as the way forward on the desktop, and highly-parallel systems have been the norm for high-performance computing for a considerable time. In a surprisingly short space of time, industry has abandoned the exploitation of Moore’s Law through ever more complex uniprocessors, and is embracing a 'new' Moore's Law: the number of processor cores on a chip will double roughly every 18 months. If projected over the next 25 years this leads inevitably to the landmark of a million-core processor system. Why wait?

We are building a system containing a million ARM9 cores - not dissimilar to the processor found in many mobile phones. Whilst this is not, in any sense, a powerful core, it possesses aspects that make it ideal for an assembly of the type we are undertaking. With a million cores, we estimate we can sensibly simulate - in real time - the behaviour of a billion neurons. Whilst this is less than 1% of a human brain, in the taxonomy of brain sizes it is certainly not a primitive system, and it should be capable of displaying interesting behaviour.

A number of design axioms of the architecture are radically different to those of conventional computer systems - some would say they are downright heretical. The architecture turns out to be elegantly suited to a surprising number of application arenas, but the flagship application is neural simulation; neurobiology inspired the design.

This biological inspiration draws us to two parallel, synergistic directions of enquiry; significant progress in either direction will represent a major scientific breakthrough:

· How can massively parallel computing resources accelerate our understanding of brain function?

· How can our growing understanding of brain function point the way to more efficient parallel, fault-tolerant computation?

Technical challenges

SpiNNaker is not just another large computing system. It incorporates - at a fundamental level - a number of unorthodox design paradigms. It is designed primarily to simulate large aggregates of neurons (a billion). To do this, a million cores are interconnected by a novel communication infrastructure - details are in the publications and the SpiNNaker website. This involves distributing the topology of the network to be simulated throughout the topology of the processor network itself. The sheer size of both the simulating and simulated networks means that any central overseer - in almost any capacity - is not really feasible, and pretty much every aspect of the whole simulation ensemble has to be self-assembling. Factoring in the estimated mean time between failures intrinsic to extremely large systems compounds the technical challenges, because the simulating system has to be able to modulate its behaviour - on the fly - in the light of component and communication failures whilst a simulation is in progress.

Current Projects (in our database)

Previous Projects (in our database)

Potential PhD Projects (in our database)

Seminars Given and Upcoming

Processing with a Million Cores (Wednesday 25th January, 2012)

Grants

G1: Three‑dimensional reconstruction as an aid to computer modelling of the electrical properties of neurones in the brain 1985-1986. (With the Department of Neurophysiology).

A.D. Brown and H. Wheal

G2: Three‑dimensional reconstruction as an aid to computer modelling of the electrical properties of neurones in the brain: IBM Winchester postdoctoral fellowship, 1986-1989 (With the Department of Neurophysiology).

H. Wheal and A.D. Brown

G3: Research in mixed-mode circuit/logic level simulation: ALVEY/CAD042/TASK 6, EPSRC GR/F36453, 1989-1990.

K.G. Nichols, A.D. Brown, M. Zwolinski and T.K. Kazmierski

G4: A hardware acceleration system for mixed-mode simulation: IEATP project IED2/1/1755, EPSRC GR/H51804, 1990-1992 (With the University of Manchester.)

K.G. Nichols, A.D. Brown, M. Zwolinski and T.J. Kazmierski

G5: Circuit Level Accuracy System Simulation (CLASS): IEATP project IED2/475/30/04, EPSRC GR/H51804, 1992-1995.

K.G. Nichols, A.D. Brown, M. Zwolinski and T.J. Kazmierski

G6: Application Specific Synthesis Enforcing Testability (ASSET): ITD2/475/30/18, EPSRC GR/H51750/01, 1992-1995.

K.G. Nichols, A.D. Brown and A.J. Currie

G7: Asynchronous dead area test for synthesized ASICS: EPSRC GR/K00752, 1995-1996.

A.D. Brown, M. Zwolinski and B.R. Wilkins

G8: Novel test methodologies for mixed signal systems: EPSRC GR/J84120/01, 1994-1997.

M. Zwolinski, A.D. Brown and B.R. Wilkins

G9: High level behavioural synthesis for low power ASICS: EPSRC GR/K70748, 1996-1999.

A.D. Brown and M. Zwolinski

G10: High level floating point synthesis library: EPSRC GR/L28494, 1996-1999.

A.D. Brown

G11: Novel algorithms for analogue fault simulation: EPSRC GR/L35829, 1997-2001.

M. Zwolinski, A.D. Brown and B.R. Wilkins

G12: Self powered microsystems: EPSRC GR/M35086, 1999-2002.

N.M. White, J.N. Ross, A.D. Brown and J.D. Turner

G13: Low-Power Built-in-Self-Test: EPSRC GR/S05557, 2003-2006

B.M Al-Hashimi, A.D. Brown, M. Zwolinski

G14: Royal Society Industrial Fellowship: Royal Society: LME Design Automation, 2001-2003

A.D. Brown

G15: System-on-chip design methods and tools (Platform grant): EPSRC GR/595770/01, 2004-2007

B.M. Al-Hashimi, A.D. Brown, M. Zwolinski and P.R. Wilson

G16: A scalable chip multiprocessor for large scale neural simulation: EPSRC EP/D079594/1, 2006-2009

A.D. Brown, M.Zwolinski, N.R. Shadbolt and P.R.Wilson

G17: Network: Developing a common vision for UK research in microelectronic design: EPSRC EP/D054028/1, 2006-2007

A.D Brown, S.B. Furber and R. Woods

G18: MIDAS on a chip: Ringfenced EPSRC DTA award, 2006-2009

A.D. Brown and C.N. Mitchell

G19: Biologically inspired massively parallel architectures: EPSRC .EP/G015775/1, 2009-2014

A.D. Brown, J.E. Chad, J.S. Reeve and P.R. Wilson,

G20: Network: eFutures : EPSRC

A.D. Brown

G21: Erasmus Mundus: EU

P.R. Wilson and A.D. Brown

G22: Network: eFuturesXD: EPSRC

A.D. Brown