Number of items: 265.
2011
Acharyya, A., Maharatna, K. and Al-Hashimi, B.
(2011)
Predictive Algorithm Based Low Complexity 2D FastICA.
In:
UK Electronics Forum 2011, 4-5 July, 2011, University of Manchester, Manchester, UK.
(In Press)
Acharyya, A., Maharatna, K., Al-Hashimi, B. and Reeve, J.
(2011)
Co-ordinate Rotation based Low Complexity N-D FastICA Algorithm and Architecture.
IEEE Transactions on Signal Processing
.
(In Press)
Acharyya, A., Maharatna, K., Al-Hashimi, B. and Tudugalle, H.
(2011)
Simplified Logic Design Methodology for Fuzzy Membership Function based Robust Detection of Maternal Modulus Maxima Location : a Low Complexity Fetal ECG Extraction Architecture for Mobile Health Monitoring Systems.
In:
IEEE International Symposium on Circuits and Systems, 15-18 May, 2011, Rio de Janeiro, Brazil.
(In Press)
De Jager, D., Wood, A. L., Merrett, G. V., Al-Hashimi, B. M., O'Hara, K., Shadbolt, N. R. and Hall, W.
(2011)
A low-power, distributed, pervasive healthcare system for supporting memory.
In:
1st ACM MobiHoc Workshop on Pervasive Wireless Healthcare (MobileHealth 2011), 16th May 2011, Paris, France.
Ejlali, A., Al-Hashimi, B. and Eles, P.
(2011)
Low-Energy Standby-Sparing for Hard Real-Time Systems.
IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
.
ISSN
(In Press)
Kazmierski, T., Wang, L., Al-Hashimi, B. and Merrett, G.
(2011)
An explicit linearized state-space technique for accelerated simulation of electromagnetic vibration energy harvesters.
IEEE Transactions on COMPUTER-AIDED DESIGN of Integrated Circuits and Systems
.
(In Press)
Khursheed, S. S., Yang, S., Al-Hashimi, B., Huang, X. and Flynn, D.
(2011)
Improved DFT for Testing Power Switches.
In:
16th IEEE European Test Symposium (ETS 2011), 23-27 May, 2011, Trondheim, Norway.
Mistry, J., Al-Hashimi, B., Flynn, D. and Hill, S.
(2011)
Sub-Clock Power-Gating Technique for Minimising Leakage Power During Active Mode.
In:
Design, Automation and Test in Europe, 14-18 March 2011, Grenoble, France.
Shafik, R. and Al-Hashimi, B.
(2011)
Reliability Analysis of On-Chip Communication Architectures: An MPEG-2 Video Decoder Case Study.
Embedded Hardware Design (MICPRO), 35
(2).
pp. 285-296.
Shafik, R., Al-Hashimi, B. and Reeve, J.
(2011)
Design Optimization of Low Power and Reliable Time-Constrained Homogeneous MPSoCs.
TBA
.
(Submitted)
Wang, L., Kazmierski, T., Al-Hashimi, B., Weddell, A., Merrett, G. and Ayala Garcia, I.
(2011)
Accelerated simulation of tunable vibration energy harvesting systems using a linearised state-space technique.
In:
Design, Test and Automation in Europe (DATE 2011), March 14-18, 2011, Grenoble, France.
Weddell, A., Merrett, G. and Al-Hashimi, B.
(2011)
Photovoltaic Sample-and-Hold Circuit Enabling MPPT Indoors for Low-Power Systems.
IEEE Transactions on Circuits and Systems I: Regular Papers
.
(In Press)
Weddell, A., Merrett, G. and Al-Hashimi, B.
(2011)
Ultra Low-Power Photovoltaic MPPT Technique for Indoor and Outdoor Wireless Sensor Nodes.
In:
Design, Automation and Test in Europe (DATE), 14-18 March 2011, Grenoble, France. pp. 905-908.
Weddell, A., Merrett, G., Kazmierski, T. and Al-Hashimi, B.
(2011)
Accurate Supercapacitor Modeling for Energy-Harvesting Wireless Sensor Nodes.
IEEE Transactions on Circuits and Systems II: Express Briefs
.
(In Press)
Wood, A. L., de Jager, D., Merrett, G. V., Al-Hashimi, B. M., O'Hara, K., Shadbolt, N. R. and Hall, W.
(2011)
DejaView: a low-power, distributed, pervasive system for supporting memory.
In:
1st ACM MobiHoc Workshop on Pervasive Wireless Healthcare (MobileHealth 2011), 16th May 2011, Paris, France.
(Unpublished)
Yang, S., Khursheed, S. S., Al-Hashimi, B., Flynn, D. and Idgunji, S.
(2011)
Reliable State Retention-Based Embedded Processors Through Monitoring and Recovery.
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS
.
(In Press)
Zhao, Y., Khursheed, S. and Al-Hashimi, B.
(2011)
Cost-Effective TSV Grouping for Yield Improvement of 3D-ICs.
In:
ATS 2011, November 2011, India.
(In Press)
Zhong, S., Khursheed, S. and Al-Hashimi, B.
(2011)
A Fast and Accurate Process Variation-aware Modeling Technique for Resistive Bridge Defects.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
.
(In Press)
Zhong, S., Khursheed, S., Al-Hashimi, B., Reddy, S. and Chakrabarty, K.
(2011)
Analysis of Resistive Bridge Defect Delay Behavior in the Presence of Process Variation.
In:
Asian Test Symposium 2011, 21-23 November, 2011, New Delhi, India.
(In Press)
2010
Acharyya, A., Maharatna, K. and Al-Hashimi, B.
(2010)
Co-ordinate Rotation Based Low Complexity 2D FastICA Algorithm and Architecture.
In:
International Conference on Green Circuits and Systems (ICGCS) , 21-23 June, 2010, Shanghai, China.
(In Press)
Acharyya, A., Maharatna, K., Al-Hashimi, B. and Mondal, S.
(2010)
Robust Channel Identification Scheme: Solving Permutation Indeterminacy of ICA for Artifacts Removal from ECG.
In:
32nd Annual International IEEE EMBS Conference, August 31 - September 4, 2010, Buenos Aires, Argentina.
(In Press)
Acharyya, A., Mondal, S., Maharatna, K. and Al-Hashimi, B.
(2010)
Automated and Robust Channel Identification Algorithm and Architecture to Solve Permutation Problem of ICA for Artifacts Removal from ECG in Remote Health Monitoring Environment.
In:
Sixth UK Embedded Forum, 30 June - 1 July, 2010, University of Newcastle-upon-Tyne, United Kingdom.
(In Press)
Acharyya, A., Tudugalle, H., Maharatna, K., Al-Hashimi, B. and Gunn, S.
(2010)
VLSI ARCHITECTURE FOR FETAL ECG EXTRACTION FOR PERSONALIZED HEALTHCARE APPLICATION WITHIN RESOURCE CONSTRAINED ENVIRONMENT.
In:
Sixth UK Embedded Forum, 30 June - 1 July, 2010, University of Newcastle-upon-Tyne, United Kingdom.
(In Press)
Acharyya, A., Maharatna, K. and Al-Hashimi, B.
(2010)
Algorithm and Architecture for N-D Vector Cross-Product Computation.
IEEE Transactions on Signal Processing
.
(In Press)
Ali, M., Al-Hashimi, B., Recas, J. and Atienza, D.
(2010)
Evaluation and Design Exploration of Solar Harvested-Energy Prediction Algorithm.
In:
DATE 2010 - Design Automation and Test in Europe 2010, 8-12 March 2010, Dresden, Germany.
(In Press)
Ejlali, A., Al-Hashimi, B. M., Rosinger, P., Miremadi, S. G. and Benini, L.
(2010)
Performability/Energy Trade-off in Error-Control Schemes for On-Chip Networks.
IEEE Transactions on VLSI Systems, 18
(1).
pp. 1-14.
ISSN 10638210
Kazmierski, T., Zhou, D., Al-Hashimi, B. and Ashburn, P.
(2010)
Numerically efficient modelling of CNT transistors with ballistic and non ballistic effects for circuit simulation.
IEEE Transactions on Nanotechnology, 9
(1).
pp. 99-107.
Khursheed, S. S., Al-Hashimi, B., Chakrabarty, K. and Harrod, P.
(2010)
Gate-Sizing-Based Single Vdd Test for Bridge Defects in Multi-Voltage Designs.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
.
(In Press)
Khursheed, S. S., Zhong, S., Al-Hashimi, B., Aitken, R. and Kundu, S.
(2010)
Modeling the Impact of Process Variation on Resistive Bridge Defects.
In:
International Test Conference, Austin, Texas, USA.
Li, L., Maunder, R. G., Al-Hashimi, B. M. and Hanzo, L.
(2010)
An energy-efficient error correction scheme for IEEE 802.15.4 wireless sensor networks.
IEEE Transactions on Circuits and Systems II, 57
(3).
233-237 .
ISSN 1549-7747
Li, L., Maunder, R. G., Al-Hashimi, B. and Hanzo, L.
(2010)
A Low-Complexity Turbo Decoder Architecture for Energy-Efficient Wireless Sensor Networks.
IEEE Transactions on Very Large Scale Integration
.
(In Press)
Li, L., Maunder, R. G., Al-Hashimi, B. M. and Hanzo, L.
(2010)
Design of Fixed-Point Processing Based Turbo Codes Using Extrinsic Information Transfer Charts.
In:
IEEE Vehicular Technology Conference, September 2010, Ottawa, Canada.
Shafik, R. A., Al-Hashimi, B. M. and Chakrabarty, K.
(2010)
Soft Error-Aware Design Optimization of Low Power and Time-Constrained Embedded Systems.
In:
Design, Automation and Test in Europe (DATE), March, 2010, Dresden, Germany.
Srivastava, S., Melouki, A. and Al-Hashimi, B.
(2010)
Tagged Repair Techniques for Defect Tolerance in Hybrid nano/CMOS Architecture.
IEEE NanoTechnology Council
.
ISSN 1536-125X
(In Press)
Yang, S., Al-Hashimi, B., Flynn, D. and Khursheed, S.
(2010)
Scan Based Methodology for Reliable State Retention Power Gating Designs.
In:
Design, Automation and Test in Europe, 08/March/2010, Dresden, Germany .
(In Press)
2009
Acharyya, A., Maharatna, K. and Al-Hashimi, B.
(2009)
HARDWARE REDUCTION METHODOLOGY FOR 2-DIMENSIONAL KURTOTIC FASTICA
BASED ON ALGORITHMIC ANALYSIS AND ARCHITECTURAL SYMMETRY.
In:
IEEE Workshop on Signal Processing Systems, 7-9 October, 2009, Tampere, Finland .
(In Press)
Acharyya, A., Maharatna, K., Al-Hashimi, B. and Gunn, S.
(2009)
Memory Reduction Methodology for Distributed-Arithmetic-Based DWT/IDWT Exploiting Data Symmetry.
IEEE Transactions on Circuits and Systems- II: Express Briefs, 56
(4).
pp. 285-289.
Acharyya, A., Maharatna, K., Sun, J., Al-Hashimi, B. and Gunn, S.
(2009)
Hardware Efficient Fixed-Point VLSI Architecture for 2D Kurtotic FastICA.
In:
19th European Conference on Circuit Theory and Design , 23-27 August, 2009, Antalya, Turkey. pp. 165-168.
Darbari, A., Al Hashimi, B. M., Flynn, D. and Biggs, J.
(2009)
Selective State Retention Design using Symbolic Simulation.
In:
DATE 2009.
(In Press)
Ejlali, A., Al-Hashimi, B. and Eles, P.
(2009)
A standby-Sparing Technique with Low Energy-Overhead for Fault-Tolerant Hard Real-Time Systems.
In:
International Conference on Hardware/Software Codesign and System Synthesis, 11-16 Oct. 2009, Grenoble, France.
El Shabrawy, K., Maharatna, K., Bagnall, D. and Al-Hashimi, B.
(2009)
Modeling SWCNT Band-gap and Effective Mass Variation using a Monte Carlo Approach.
IEEE Transactions on Nanotechnology
.
(Submitted)
El Shabrawy, K., Maharatna , K. and Al-Hashimi, B.
(2009)
Exploiting SWCNT Structural Variability Towards the Development of a Photovoltaic Device.
Submitted to:
International Symposium on Integrated Circuits (ISIC2009), 16/12/2009, Singapore.
(Submitted)
El-Maleh, A., Al-Hashimi, B. and Melouki, A.
(2009)
Defect Tolerant N^2-Transistor Structure for Reliable Nanoelectronic Designs.
IET Computers & Digital Techniques.
(Submitted)
Ingelsson, U., Al-Hashimi, B. M., Khursheed, S., Reddy, S. M. and Harrod, P.
(2009)
Process Variation-Aware Test for Resistive Bridges.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 28
(8).
pp. 1269-1274.
ISSN 0278-0070
Kazmierski, T., Zhou, D. and Al-Hashimi, B.
(2009)
HSPICE implementation of a numerically efficient model of CNT transistor.
Submitted to:
Forum on Specification and Design Languages (FDL 2009), September 22-24, 2009, Germany.
(Submitted)
Kazmierski, T., Zhou, D., Al-Hashimi, B. and Ashburn, P.
(2009)
Numerically efficient modeling of CNT transistors with ballistic and non-ballistic effects for circuit simulation.
IEEE Transactions on Nanotechnology
.
(Submitted)
Khursheed, S. S. and Al-Hashimi, B.
(2009)
Test Strategies for Multi-Voltage Designs.
In:
Power-Aware Testing and Test Strategies for Low Power Devices,
Springer.
(In Press)
Khursheed, S. S., Al-Hashimi, B. and Harrod, P.
(2009)
Test Cost Reduction for Multiple-Voltage Designs with Bridge Defects through Gate-Sizing.
In:
Design, Automation and Test in Europe, April, 2009, Nice, France.
(In Press)
Khursheed, S. S., Al-Hashimi, B., Reddy, S. M. and Harrod, P.
(2009)
Diagnosis of Multiple-Voltage Design with Bridge Defect.
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS,, 28
(3).
pp. 406-416.
ISSN 02780070
Melouki, A., Srivastava, S. and Al-Hashimi, B.
(2009)
Fault Tolerance Techniques for Hybrid CMOS/Nano Architecture.
IET Computers & Digital Techniques
.
(In Press)
Merrett, G., White, N., Harris, N. and Al-Hashimi, B.
(2009)
Energy-Aware Simulation for Wireless Sensor Networks.
In:
Sixth Annual IEEE Communications Society Conference on Sensor, Mesh and Ad Hoc Communications and Networks (SECON 2009), 22-26 June 2009, Rome, Italy.
Mishra, B., Al-Hashimi, B. and Zwolinski, M.
(2009)
Variation Resilient Adaptive Controller for Subthreshold Circuits.
In:
DATE, 2009, 20-24 April, 2009, Nice, France.
(In Press)
Shafik, R. A. and Al-Hashimi, B. M.
(2009)
Comparative Reliability Analysis between AMBA and Network-on-Chip: An MPEG-2 Case Study.
In:
22nd International System-on-Chip Conference (SOCC), Belfast, Northern Ireland. pp. 247-250.
Shafik, R. A., Al-Hashimi, B. M., Kundu, S. and Ejlali, A.
(2009)
Soft Error-Aware Voltage Scaling Technique for Power Minimization in Application-Specific MPSoC.
Journal of Low Power Electronics (JOLPE), 5
(2).
pp. 145-156.
Srivastava, S., Melouki, A. and Al-Hashimi, B.
(2009)
Defect Tolerance in Hybrid nano/CMOS Architecture using Tagging Mechanism.
In:
IEEE/ACM Symposium on Nanoscale Architectures, July 30-31, San Francisco, USA.
(In Press)
Srivastava, S., Melouki, A. and Al-Hashimi, B.
(2009)
Repair Techniques for Hybrid Nano/CMOS Computational Architecture.
In:
IEEE Conference on Nanotechnology, IEEE NANO 2009, July 26-31, Genoa, Italy.
(In Press)
Wang, L., Kazmierski, T., Al-Hashimi, B., Beeby, S. and Zhu, D.
(2009)
An automated design flow for vibration-based energy harvester systems.
In:
Design, Test and Automation in Europe (DATE 2009), 20-24 April 2009, Nice, France. pp. 1391-1396.
Zhou, D., Kazmierski, T. and Al-Hashimi, B.
(2009)
VHDL-AMS IMPLEMENTATION OF A NUMERICAL BALLISTIC CNT MODEL.
In:
Languages for Embedded Systems and their Applications,
VTEX Book Production.
(Submitted)
2008
Acharyya, A., Maharatna, K. and M. Al Hashimi, B.
(2008)
Hardware Development for Pervasive Healthcare Systems: Current Status and Future Directions.
In:
2008 IEEE Asia Pacific Conference on Circuits and Systems, 30 November - 3 December, 2008, Macao, China. pp. 1304-1307.
Darbari, A. and Al-Hashimi, B.
(2008)
Hardware Dependability in the Presence of Soft Errors.
In:
BCS Visions of Computer Science, 22-24 Sep 2008, Imperial College, London, England.
(In Press)
Darbari, A. and Al-Hashimi, B.
(2008)
Symbolic Simulation based Transient Fault Injection Methodology.
Technical Report 15376,
Electronics and Computer Science, University of Southampton.
Darbari, A., Al-Hashimi, B., Harrod, P. and Bradley, D.
(2008)
A New Approach for Transient Fault Injection using Symbolic Simulation.
In:
IOLTS 2008.
(In Press)
Darbari, A., Al-Hashimi, B., Harrod, P. and Bradley, D.
(2008)
A Novel Transient Fault Injection Methodology Based on STE Model Checking.
In:
European Test Symposium (ETS), May 25-28, Italy.
El Shabrawy, K., Maharatna, K., Bagnall, D. and Al-Hashimi, B.
(2008)
A new analytical model for predicting SWCNT band-gap from geometric properties.
In:
International Conference on IC design and technology (ICICDT 2008), 2-4 June, Grenoble, France. pp. 211-214.
Ingelsson, U., Al-Hashimi, B. M. and Harrod, P.
(2008)
Variation Aware Analysis of Bridging Fault Testing.
In:
17th Asian Test Symposium, 24-27 Nov 2008, Sapporo, Japan.
(In Press)
Kazmierski, T., Zhou, D. and Al-Hashimi, B.
(2008)
Efficient circuit-level modelling of ballistic CNT using piecewise non-linear approximation of mobile charge density.
In:
DATE08. pp. 146-151.
Khursheed, S., Ingelsson, U., Rosinger, P., Al-Hashimi, B. and Harrod, P.
(2008)
Bridging Fault Test Method with Adaptive Power Management Awareness.
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS
.
(In Press)
Maharatna, K., El Shabrawy, K. and Al-Hashimi, B.
(2008)
Reduced Z-datapath CORDIC rotator.
In:
IEEE ISCAS, May 2008, Seattle, Washington, USA. pp. 3374-3377.
Maunder, R. G., Weddell, A. S., Merrett, G. V., Al-Hashimi, B. M. and Hanzo, L.
(2008)
Iterative Decoding for Redistributing Energy Consumption in Wireless Sensor Networks.
In:
International Conference on Computer Communications and Networks, 3-7 August 2008, St. Thomas, U.S. Virgin Islands.
Merrett, G. V., Weddell, A. S., Harris, N. R., Al-Hashimi, B. M. and White, N. M.
(2008)
A Structured Hardware/Software Architecture for Embedded Sensor Nodes.
In:
17th International Conference on Computer Communications and Networks, 03-07 August 2008, St Thomas, Virgin Islands (USA).
Merrett, G. V., Harris, N. R., Al-Hashimi, B. M. and White, N. M.
(2008)
Energy Managed Reporting for Wireless Sensor Networks.
Sensors and Actuators A: Physical, 142
(1).
pp. 379-389.
Merrett, G. V., Weddell, A. S., Berti, L., Harris, N. R., White, N. M. and Al-Hashimi, B. M.
(2008)
A Wireless Sensor Network for Cleanroom Monitoring.
In:
Eurosensors 2008, 07-11 September 2008, Dresden, Germany. pp. 1553-1556.
Merrett, G. V., Weddell, A. S., Lewis, A. P., Harris, N. R., Al-Hashimi, B. M. and White, N. M.
(2008)
An Empirical Energy Model for Supercapacitor Powered Wireless Sensor Nodes.
In:
17th International IEEE Conference on Computer Communications and Networks, 03-07 August 2008, St Thomas, Virgin Islands (USA).
Mishra, B. and M. Al-Hashimi, B.
(2008)
Subthreshold FIR Filter Architecture for Ultra Low Power Applications.
In:
LNCS,
pp. 1-10, Springer.
ISBN 978-3-540-95947-2
Mishra, B., Wilson, P. and Al-Hashimi, B.
(2008)
Advancement in Color Image Processing using Geometric Algebra.
In:
EUSIPCO.
Ogg, S., Al-Hashimi, B. and Yakovlev, A.
(2008)
Asynchronous Transient Resilient Links for NoC.
Submitted to:
CODES+ISSS, October 19th - 24th, Atlanta.
(Submitted)
Ogg, S., Valli, E., Al-Hashimi, B., Yakovlev, A., D'Alessandro, C. and Benini, L.
(2008)
Serialized Asynchronous Links for NoC.
In:
DATE , 2008, Munich.
(In Press)
Shafik, R., Rosinger, P. and Al-Hashimi, B.
(2008)
SystemC-based Minimum Intrusive Fault Injection Technique with Improved Fault Representation.
In:
International On-line Test Symposium (IOLTS), 7-9 July, 2008, Rhodes, Greece. pp. 99-104.
Shafik, R. A., Rosinger, P. and Al-Hashimi, B. M.
(2008)
MPEG-based Performance Comparison between Network-on-Chip and AMBA MPSoC.
In:
2008 IEEE Design and Diagnostics of Electronic Circuits and Systems, 16-18April, 2008, Bratislava, Slovakia. pp. 98-103.
Shafik, R. A., Rosinger, P. and Al-Hashimi, B. M.
(2008)
SystemC-based Fault Injection Technique with Improved Fault Representation.
In:
European Test Symposium (ETS), May 25-28, Italy.
Spikings, S., Al-Hashimi, B. and Harris, N.
(2008)
Unobtrusive Welfare Monitoring System.
(Unpublished)
Wang, L., Kazmierski, T., Al-Hashimi, B., Beeby, S. and Torah, R.
(2008)
Integrated approach to energy harvester mixed technology modelling and performance optimisation.
In:
Design, Automation and Test in Europe (DATE 2008), March 10-14, 2008, Munich, Germany.
Weddell, A. S., Merrett, G. V., Harris, N. R. and Al-Hashimi, B. M.
(2008)
Energy Harvesting and Management for Wireless Autonomous Sensors.
Measurement + Control, 41
(4).
pp. 104-108.
ISSN 0020-2940
Wilson, P., McNally, I., Swabey, M. and Al-Hashimi, B.
(2008)
IC Design and Manufacture for Undergraduates: Theory, Design and Practice.
In:
7th European Workshop on Microelectronics Education, 28th May 2008, Budapest, Hungary. pp. 22-23.
Wilson, P., Wilcock, R., McNally, I., Swabey, M. and Al-Hashimi, B.
(2008)
The Superchip: Innovative Teaching of IC Design and Manufacture.
In:
Custom Integrated Circuits Conference, September 2008, San Jose, Ca, USA.
(In Press)
Zhou, D., Kazmierski, T. and Al-Hashimi, B.
(2008)
VHDL-AMS implementation of a numerical
ballistic CNT model for logic circuit simulation.
In:
Specification, Verification and Design Languages, 2008. FDL 2008. Forum on, 23-25 Sept. 2008, Stuttgart. pp. 94-98.
2007
Zain Ali, N. B., Zwolinski, M. and Al-Hashimi, B.
(2007)
Testing of Level Shifters in Multiple Voltage
Designs.
In:
14th IEEE International Conference on Electronics, Circuits and Systems, 11-14 May 2007, Morocco.
Ali, H. and Al-Hashimi, B. M.
(2007)
Architecture Level Power-Performnace Trade-offs for Pipelined Design.
In:
IEEE Symposium on Circuits and Systems (ISCAS 07), 27-30 May 2007, New Orleans, US.
Andrei, A., Eles, P., Peng, Z., Schmitz, M. and Al-Hashimi, B. M.
(2007)
Energy Optimization of Multiprocessor Systems on Chip By Voltage Selection.
IEEE Transactions on VLSI Systems
.
ISSN 1063-8210
(In Press)
Dilillo, L. and Al-Hashimi, B. M.
(2007)
March CRF: an Efficient Test for Complex Read Faults in SRAM Memories.
In:
X Workshop on Design and Diagnostics of Electronic Circuits and Systems, April 11th – 13th, 2007, Krakow, Poland.
Ejlali, A., Al-Hashimi, B. M., Rosinger, P. and Miremadi, S. G.
(2007)
Joint Consideration of Fault-Tolerance, Energy-Efficiency and Performance in on-Chip Networks.
In:
Design, Automation and Test in Europe (DATE07), 16-20 April 2007, Nice, France.
(In Press)
Kazmierski, T., Zhou, D. and Al-Hashimi, B.
(2007)
A Fast, Numerical Circuit-Level Model of Carbon Nanotube Transistor.
In:
Nanoscale Architectures, 2007. NANOSARCH 2007. IEEE International Symposium on, 21-22 Oct. 2007, San Jose, CA. pp. 33-37.
Ochoa-Montiel, M. A., Al-Hashimi, B. M. and Kollig, P.
(2007)
Exploiting Power-Area Tradeoffs in Behavioural Synthesis through clock and operations throughput selection.
In:
ASPDAC, 23 -27 January, Japan.
Ogg, S., Valli, E., D'Allesandro, C., Yakovlev, A., Al-Hashimi, B. and Benini, L.
(2007)
Reducing Interconnect Cost in NoC through Serialized Asynchronous Links.
In:
The 1st ACM/IEEE International Symposium on Networks-on-Chip, May 6th -9th 2007, Princeton, NJ.
(In Press)
Wang, L., Kazmierski, T., Al-Hashimi, B., Beeby, S. and Torah, R.
(2007)
An Integrated Approach to Energy Harvester Modeling and Performance Optimization.
In:
IEEE Behavioral Modeling and Simulation Conference (BMAS 2007), September 20-21, 2007, San Jose, California, USA. pp. 121-125.
Zhang, Z., Reddy, S. M., Pomeranz, I., Rajski, J. and Al-Hashimi, B. M.
(2007)
Enhancing Delay Fault Coverage Through Low Power Segmented Scan.
IEEProceedings: Computer and Digital Techniques
.
(In Press)
Zhang, Z., Reddy, S. M., Pomeranz, I., Rajski, J. and Al-Hashimi, B. M.
(2007)
Enhancing delay fault coverage through low power segmented scan.
IEE Proceedings: Computer and Digital Techniques
.
(In Press)
Zhiyuan, H., Peng, Z., Eles, P., Rosinger, P. and Al-Hashimi, B. M.
(2007)
Thermal-Aware Soc Test Scheduling with Test Set Partitioning and Interleaving.
Journal of Electronic Testing: Theory and Applications (JETTA), Special issue on "Low Power Test"
.
(Submitted)
2006
Al-Hashimi, B. M., ed.
(2006)
System-on-Chip: Next Generation Electronics.
IEE Press.
ISBN 0-86341-552-0
Cai, Y., Schmitz, M., Al-Hashimi, B. M. and Reddy, S. M.
(2006)
Workload-Ahead-Driven Online Energy Minimization Techniques for Battery-Powered Embedded Systems with Time-Constraints.
ACM Transactions on Design Automation of Electronic Systems
.
Cai, Y., Schmitz, M., Ejlali, A., Al-Hashimi, B. and Reddy, S.
(2006)
Cache Size Selection for Performance, Energy and Reliability of Time-Constrained Systems.
In:
11th Asia and South Pacific Design Automation Conference (ASP-DAC 2006), Japan.
(In Press)
Collins, M., Al-Hashimi, B. and Wilson, P.
(2006)
On-chip timing measurement architecture with femtosecond resolution.
Electronics Letters, 42
(9).
pp. 528-530.
Collins, M. and Al-Hashimi, B. M.
(2006)
On-Chip Time Measurement Architecture with Femtosecond Timing Resolution.
In:
11th IEEE European Test Symposium (ETS'06), 21-25 May, Southampton, UK.
(In Press)
Collins, M. and Al-Hashimi, B. M.
(2006)
On-Chip Time Measurement Architecture with Femtosecond Timing Resolution.
In:
11th IEEE European Test Symposium (ETS'06), 21-25 May, Southampton, UK.
DILILLO, L., ROSINGER, P., AL-HASHIMI, B. M. and GIRARD, P.
(2006)
Minimizing Test Power in SRAM through Reduction of Pre-charge Activity.
In:
DATE - Design Automation and Test in Europe, 6-10 March 2006, Munich, Germany.
(In Press)
Dilillo, L., Hashimi, B. M., Rosinger, P. and Girard, P.
(2006)
Leakage Read Fault in Nanoscale SRAM: Analysis, Test and Diagnosis.
In:
International Design and Test Workshop, 19-20 November 2006, Duday.
Dilillo, L., Rosinger, P., Al-Hashimi, B. M. and Girard, P.
(2006)
Reducing Power Dissipation in SRAM during Test.
Journal of Low Power Electronics
.
(In Press)
Ejlali, A., Al-Hashimi, B. M., Schmitz, M., Rosinger, P. and Miremadi, S. G.
(2006)
Combined Time and Information Redundancy for SEU-Tolerance in Energy-Efficient Real-Time Systems.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
.
ISSN 1063-8210
(In Press)
Merrett, G. V., Harris, N. R., Al-Hashimi, B. M. and White, N. M.
(2006)
Rule Managed Reporting in Energy Controlled Wireless Sensor Networks.
In:
Eurosensors XX, 17th-20th September 2006, Gothenburg, Sweden. pp. 402-403.
Merrett, G. V., Harris, N. R., Al-Hashimi, B. M. and White, N. M.
(2006)
Energy Controlled Reporting for Industrial Monitoring Wireless Sensor Networks.
In:
IEEE Sensors 2006, 22nd-25th October 2006, Daegu, Korea. pp. 892-895.
Merrett, G. V., Weddell, A. S., Harris, N. R., White, N. M. and Al-Hashimi, B. M.
(2006)
The Unified Framework for Sensor Networks: A Systems Approach.
Technical Report UF1,
School of Electronics & Computer Science, University of Southampton.
(Unpublished)
Wilson, P. R., Al Hashimi, B., Brown, A. D. and Zwolinski, M.
(2006)
A Masters Course in System on Chip.
In:
European Workshop on Microelectronics Education, June 2006, Stockholm. pp. 11-14.
Wu, D., Al-Hashimi, B. M. and Schmitz, M. T.
(2006)
Improving Routing Efficiency for Network-on-Chip through Contention-Aware Input Selection.
In:
11th Asia and South Pacific Design Automation Conference (ASP-DAC 2006), 2006, Japan.
(In Press)
Wuertemberger, A., Rosinger, P., Al-Hashimi, B. and Chakrabarty, K.
(2006)
Cost Model-Driven Test Resource Partitioning for SoCs.
IEE Electronics Letters
.
Zain Ali, N. B., Zwolinski, M., Al-Hashimi, B. M. and Harrod, P.
(2006)
Dynamic Voltage Scaling Aware Delay Fault Testing.
In:
European Test Symposium, May 21-25, 2006, Southampton.
Zhang, Z., M. Reddy, S., Pomeranz, I., Rajski, J. and M. Al-Hashimi, B.
(2006)
Enhancing Delay Fault Coverage through Low Power Segmented Scan.
11th IEEE European Test Symposium, Southampton, UK, 21-24 May 2006
.
Zhiyuan, H., Peng, Z., Eles, P., Rosinger, P. and Al-Hashimi, B. M.
(2006)
Thermal-aware SoC test scheduling with test set partitioning and interleaving.
In:
”, International Symposium on Defect and Fault Tolerance in VLSI System, 3-4 October 2006, Washington DC.
(In Press)
2005
Cai, Y., Reddy, S., Pomeranz, I. and Al-Hashimi, B. M.
(2005)
Battery-aware dynamic voltage scaling in multiprocessor embedded system.
In:
IEEE ISCAS, May 2005, Japan.
(In Press)
Andrei, A., Schmitz, M. T., Eles, P., Peng, Z. and Al-Hashimi, B. M.
(2005)
Quasi-Static Voltage Scaling for Energy Minimization with Time Constraints.
In:
Design, Automation and Test Europe Conference (DATE2005), March 2005, Munich, Germany.
Cai, Y., Schmitz, M. T., Al-Hashimi, B. M. and Reddy, S. M.
(2005)
Workload-Ahead-Driven Online Energy Minimization Techniques for Battery-Powered Embedded Systems with Time-Constraints.
In:
IFIP International Conference on Very Large Scale Integration (VLSI-SOC), October, 2005, Australia.
(In Press)
Collins, M., Al-Hashimi, B. and Ross, N.
(2005)
A Programmable Time Measurement Architecture for Embedded Memory Characterization.
In:
10th IEEE European Test Symposium (ETS'05), 22-25 May, Tallinn, Estonia. pp. 128-133.
Ejlali, A., Schmitz, M., Al-Hashimi, B. M., Miremadi, S. G. and Rosinger, P.
(2005)
Energy Efficient SEU-Tolerance in DVS-Enabled Real-Time Systems through Information Redundancy.
In:
International Symposium on Low Power Electronics and Design (ISLPED 2005), August 8-10, 2005, San Diego, California, USA.
(In Press)
Gonciari, P. T., Al-Hashimi, B. and Nicolici, N.
(2005)
Synchronization Overhead in SOC Compressed Test.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 13
(1).
pp. 140-152.
Jafaipanah, M., Al-Hashimi, B. and White, N.
(2005)
Dynamic sensor compensation using adaptive filter compatible with digital technology.
IEEE Proceedings on Circuits, Devices and Systems, 152
(6).
pp. 745-751.
Jafaripanah, M., Al-Hashimi, B. and White, N. M.
(2005)
Application of Analog Adaptive Filters for Dynamic Sensor Compensation.
IEEE Transaction On Instrumentation and Measurement, 54
(1).
pp. 245-251.
Jafaripanah, M., Al-Hashimi, B. M. and White, N. M.
(2005)
Adaptive Sensor Response Correction Using Analog Filter Compatible with Digital Technology.
In:
IEEE International Symposium on Circuits and Systems ( ISCAS 2005), 23-26 May 2005, Kobe, Japan.
(In Press)
Jafaripanah, M., Al-Hashimi, B. M. and White, N. M.
(2005)
Dynamic Sensor Compensation Using Analogue Adaptive Filter Compatible with Digital Technology.
Accepted for publication in IEE Proc. Circuits, Devices & Systems
.
(Submitted)
Merrett, G., Al-Hashimi, B. M., White, N. M. and Harris, N. R.
(2005)
Information Managed Wireless Sensor Networks with Energy Aware Nodes.
In:
2005 NSTI Nanotechnology Conference and Trade Show (NanoTech 2005), 8-12 May 2005, Anaheim, California. pp. 367-370.
Merrett, G. V., Al-Hashimi, B. M., White, N. M. and Harris, N. R.
(2005)
Resource Aware Sensor Nodes in Wireless Sensor Networks.
In:
Sensors & their Applications XIII, 6-8 September 2005, Chatham Maritime, Kent. pp. 137-142.
Ochoa-Montiel, M. A., Al-Hashimi, B. M. and Kollig, P.
(2005)
Impact of Multicycled Scheduling on Power-Area Tradeoffs in Behavioural Synthesis.
In:
2005 IEEE International Symposium on Circuits and Systems (ISCAS), 23/05/2005 - 26/05/2005, Kobe, Japan.
(In Press)
Ogg, S. and Al-Hashimi, B.
(2005)
Improved Data Compression for Serial Interconnected Network on Chip through Unused Significant Bit Removal.
In:
19th International Conference on VLSI Design, 3-7 January 2006, Hyderabad, India.
(In Press)
Rosinger, P., Al-Hashimi, B. and Chakrabarty, K.
(2005)
Rapid generation of thermal-safe test schedules.
In:
Design Automation and Test in Europe (DATE), 7-11 March 2005, Munich, Germany.
(In Press)
Rosinger, P., Al-Hashimi, B. and Chakrabarty, K.
(2005)
Thermal-Safe Test Scheduling for Core-Based System-on-a-Chip Integrated Circuits.
IEEE Transactions on Computer Aided Design, 25
(11).
pp. 2502-2512.
Schmitz, M. T., Al-Hashimi, B. M. and Eles, P.
(2005)
Co-Synthesis of Energy-Efficient Multi-Mode Embedded Systems with Consideration of Mode Execution Probabilities.
IEEE Transactions on Computer-Aided Design
.
Schmitz T., M., Al-Hashimi, B. M. and Eles, P.
(2005)
Co-Synthesis of Energy-Efficient Multi-Mode Embedded Systems with Consideration of Mode Execution Probabilities.
IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems, 24
(2).
pp. 153-169.
ISSN 0278-0070
Tafaj, E., Rosinger, P., Al-Hashimi, B. and Chakrabarty, K.
(2005)
Improving Thermal-Safe Test Scheduling for Core-Based
Systems-on-Chip Using Shift Frequency Scaling.
In:
International Symposium on Defect and Fault Tolerance in VLSI Systems, 3-5 October, Monterey, CA.
(In Press)
Varea, M., Al-Hashimi, B. M., Cortés, L. A., Eles, P. and Peng, Z.
(2005)
Dual Flow Nets: Modelling the Control/Data-Flow Relation in Embedded Systems.
ACM Transactions on Embedded Computing Systems (TECS)
.
ISSN 1539-9087
(In Press)
Wilcock, R., Al-Hasmimi, B. M. and Wilson, P.
(2005)
Integrated High Bandwidth Wave Elliptic Low-Pass Switched-Current Filter in Digital CMOS Technology.
Electronics Letters
.
(In Press)
Wilcock, R., Wilson, P. R. and Al-Hashimi, B.
(2005)
A Novel Switch-Current Phase Locked Loop.
In:
ISCAS 2005, May 2005, Kobe, Japan.
(In Press)
Wilson, P. R., Brown, A. D., Wilcock, R. and Al-Hashimi, B.
(2005)
Behavioural modeling and simulation of a switch-current phase locked loop.
In:
IEEE International Behavioral Modeling and Simulation Conference, September 2005, San Jose, USA.
(In Press)
Wu, D., Al-Hashimi, B. M., Schmitz, M. T. and Eles, P.
(2005)
Power-Composition Profile Driven Co-Synthesis with Power Management Selection for Dynamic and Leakage Energy Reduction.
In:
8th EUROMICRO Conference on Digital System Design, 30 August - 3 September, 2005, Porto, Portugal.
(In Press)
2004
Andrei, A., Schmitz, M., Eles, P., Peng, Z. and Al-Hashimi, B. M.
(2004)
Simultaneous Communication and Processor Voltage Scaling for Dynamic and Leakage Energy Reduction in Time-Constrained Systems.
In:
IEEE International Conference on Computer Aided Design (ICCAD), Nov 7-11, 2004, SAn Jose, CA.
(In Press)
Andrei, A., Schmitz, M. T., Eles, P., Peng, Z. and Al-Hashimi, B. M.
(2004)
Overhead-Conscious Voltage Selection for Dynamic and Leakage Power Reduction of Time-Constraint Systems.
In:
Design, Automation and Test Europe Conference (DATE2004), Feb 2004, Paris, France. pp. 518-523.
Andrei, A., Schmitz, M. T., Eles, P., Peng, Z. and Al-Hashimi, B. M.
(2004)
Simultaneous Communication and Processor Voltage Scaling for Dynamic and Leakage Energy Reduction in Time-Constrained Systems.
In:
International Conference on Computer-Aided Design, Nov 2005, San Jose, USA. pp. 361-367.
Chang, C. M., Al-Hashimi, B. M. and Ross, N. J.
(2004)
Unified Active Filter Structures.
IEE Proceedings: Circuits, Devices and Systems
.
Chang, C. M., Al-Hashimi, B. M., Sun, Y. and Ross, N. J.
(2004)
New High Order Filter Structures Using Only Single-Ended-Input OTAs and Grounded Capacitors.
IEEE Transactions on Circuits and Systems I: Fundamental Theroy and Applications
.
ISSN 1057-7122
Gonciari, P. T. and Al-Hashimi, B.
(2004)
A Compression-Driven Test Access Mechanism Design Approach.
In:
European Test Synposium, 23-26 May, 2004, Corsica, France.
(In Press)
Jafaripanah, M., Al-Hashimi, B. and White, N. M.
(2004)
Design Consideration and Implementation
of Analog Adaptive Filters
for Sensor Response Correction.
In:
12th Iranian Conference on Electrical Engineering (ICEE2004), 11-13 May 2004, Mashhad, Iran. pp. 109-114.
Merrett, G. and Al-Hashimi, B. M.
(2004)
Leakage Power Analysis and Comparison of Deep Submicron Logic Gates.
In:
IEEE 14th International Workshop on Power And Timing Modeling, Optimization and Simulation (PATMOS 2004), September 2004, Santorini, Greece. pp. 198-207.
Nicolici, N. and Al-Hashimi, B. M.
(2004)
Testability Trade-offs for BIST Data Paths.
Journal of Electronic Testing, Theory and Applications (JETTA), 20, Is
.
ISSN 09238174
Rosinger, P., Al-Hashimi, B. and Nicolici, N.
(2004)
Scan architecture with mutually exclusive scan segment activation for shift and capture power reduction.
IEEE Transactions on Computer Aided Design, 23
(7).
pp. 1142-1153.
Schmitz, M. T., Al-Hashimi, B. M. and Eles, P.
(2004)
Iterative schedule optimisation for voltage scalable distributed embedded systems.
ACM Transactions on Embedded Computing Systems, 3
(1).
pp. 1-36.
Schmitz, M. T., Al-Hashimi, B. M. and Eles, P.
(2004)
Iterative Schedule Optimization for Voltage Scalable Distributed Embedded Systems.
ACM Transactions on Embedded Computing Systems, 3
(1).
pp. 182-217.
Schmitz, M. T., Al-Hashimi, B. M. and Eles, P.
(2004)
System-Level Design Techniques for Energy-Efficient Embedded Systems.
Kluwer Academic Publishers.
ISBN 1-4020-7750-5
Schmitz, M. T., Al-Hashimi, B. M. and Eles, P.
(2004)
Co-Synthesis of Energy Efficient Multi-Mode Embedded Systems.
IEEE Transactions on Computer Aided Design of ICs and Systems Design
.
(In Press)
Schmitz, M. T., Al-Hashimi, B. M. and Eles, P.
(2004)
System-Level Design Techniques for Energy-Efficient Embedded Systems.
CAD Frameworks
Kluwer Academic Publishers, Boston.
ISBN Hardbound, ISBN 1-4020-7750-5
Wilcock, R. and Al-Hashimi, B. M.
(2004)
Power-Aware Design Method for Class-A Switched-Current Wave Filters.
IEE Proceedings - Circuits Devices and Systems
.
Wilcock, R. and Al-Hashimi, B. M.
(2004)
Power-Conscious Design Methodology for Class-A Switched-Current Wave Filters.
In:
IEEE International Symposium on Circuits and Systems, Vancouver, Canada.
Wu, D., Al-Hashimi, B. M. and Eles, P.
(2004)
Dynamic and Leakage Power-Composition Profile Driven Co-Synthesis for Energy and Cost Reduction.
In:
System-On-Chip Design, Test and Technology, September 2004, Loughborough, UK.
(In Press)
Xie, Y. and Al-Hashimi, B.
(2004)
Analogue Adaptive Filters Using Wave Synthesis Technique.
In:
IEEE International Symposium on Circuits and Systems 2004 (ISCAS2004), May, 2004, Vancouver, Canada.
Xie, Y. and Al-Hashimi, B.
(2004)
'Switched-Current Wave Group Delay Equalizers'.
accepted by IEE Proceedings of Circuits, Devices and Systems
.
(In Press)
2003
(2003)
Analytical Synthesis of High-Order Voltage-Mode OTA-C All-Pass filters.
In:
ISCAS(2003), 26-28 May 2003, Bangkok, Thailand.
(Unpublished)
(2003)
Versatile High-level Synthesis of Self-checking Datapaths Using an On-line Testability Metric.
In:
Design Automation and Test in Europe Conference and Exhibition, 3-7 March 2003, Munich, Germany.
Al-Hashimi, B., Xie, Y. and Zwolinski, M.
(2003)
Analysis of mirror mismatch and clock-feedthrough in Brouton transformation switched current wave filters.
IEE Proceedings- Circuits, Devices and Systems, 150
(1).
pp. 6-15.
Andrei, A., Schmitz, M., Eles, P., Peng, Z. and Al-Hashimi, B. M.
(2003)
Overhead-Conscious Voltage Selection for Dynamic and Leakage Energy Reduction of Time-Constrained Systems.
In:
Design, Automation and Test in Europe, DATE 04,, Feb. 2004, Paris.
Chang, C. M. and Al-Hashimi, B. M.
(2003)
Analytical Synthesis of Current-Mode High-Order OTA-C Filters.
IEEE Transactions on Circuit and Systems I: Fundamental Theroy and Applications, 50
(509).
pp. 1188-1192.
ISSN 1057-7122
Chang, C. M., Al-Hashimi, B. M., Wang, C. L. and Hung, C. W.
(2003)
A Single Fully Differential Current Conveyor Biquad Filters.
IEE Proceedings-Circuits, Devices and Systems
.
(Unpublished)
Gaur, M. S., Zwolinski, M. and Al-Hashimi, B.
(2003)
Concurrent Optimisation of Self-testable Designs from Behavioural Descriptions by Controller based Estimation Technique.
In:
IEEE European Test Workshop, 25 - 28 May, 2003, Mastricht, The Netherlands.
(In Press)
Gonciari, P. T., Al-Hashimi, B. and Nicolici, N.
(2003)
Test Cost Reduction Through Compression.
Electronics Systems and Software, 1
(3).
pp. 37-41.
Gonciari, P. T., Al-Hashimi, B. and Nicolici, N.
(2003)
Test Data Compression: The System Integrator’s Perspective.
In:
Design Automation and Test in Europe, 3-7 March, 2003, Munich, Germany. pp. 726-731.
Gonciari, P. T., Al-Hashimi, B. and Nicolici, N.
(2003)
Variable-Length Input Huffman Coding for System-on-a-Chip Test.
IEEE Transactions on Computer-Aided Design, 22
(6).
p. 783.
Gonciari, P. T., Al-Hashimi, B. and Nicolici, N.
(2003)
Addressing Useless Test Data in Core-Based System-on-a-Chip Test.
IEEE Transactions on Computer-Aided Design, 22
(11).
pp. 1568-1590.
Jafaripanah, M., Al-Hashimi, B. and White, N. M.
(2003)
Load Cell Response Correction Using Analog Adaptive Techniques.
In:
2003 IEEE International Symposium on Circuits and Systems (ISCAS2003), 25-28 May 2003, Bangkok, Thailand. IV-752-IV-755.
Lampropoulos, M., Al-Hashimi, B. and Rosinger, P.
(2003)
Minimization of Crosstalk Noise, Delay and Power Using a Modified Bus Invert Technique.
In:
Design, Automation and Test in Europe.
Morrissey, Q. R., Waltham, N. R., Turchetta, R., French, M. J., Bagnall, D. M. and Al Hashimi, B. M.
(2003)
Design of a 3um pixel linear CMOS sensor for earth observation.
Nuclear Instruments and Methods in Physics Research, A
(512).
pp. 350-357.
Nicolici, N. and Al-Hashimi, B. M.
(2003)
Power-Constrained Testing of VLSI Circuits.
Frontiers in Electronic Testing
Kluwer Academic Publishers.
ISBN 1-4020-7235-X
Oikonomakos, P., Zwolinski, M. and Al-Hashimi, B. M.
(2003)
Versatile High-Level Synthesis of Self-Checking Datapaths Using an On-Line Testability Metric.
In:
Design Automation and Test in Europe (DATE), March 3-7, Munich. pp. 596-601.
Rosinger, P., Al-Hashimi, B. M. and Nicolici, N.
(2003)
Dual multiple-polynomial LFSR for low-pwoer mixed-mode BIST.
IEE Proceedings: Computers and Digital Techniques, 150
(4).
pp. 209-218.
ISSN 1350-2387
Schmitz, M. T., Al-Hashimi, B. M. and Eles, P.
(2003)
A Co-Design Methodology for Energy-Efficient Multi-Mode Embedded Systems with Consideration of Mode Execution Probabilities.
In:
Design, Automation and Test Europe Conference (DATE2003), March 2003, Munich, Germany. pp. 960-965.
Scmitz, M., Al-Hashimi, B. M. and Eles, P.
(2003)
Iterative Schedule Optimisation for Voltage Scalable Distributed Embedded Systems.
ACM Transactions on Embedded Computing Systems
.
Varea, M., Leuschel, M. and Al-Hashimi, B.
(2003)
Improving Compositional Verification of State-based Models by Reducing Modular Unbalance.
In:
2nd International Workshop on Refinement of Critical Systems, 3rd June, 2003, Turku, Finland.
Wehn, N. and Al-Hashimi, B. M.
(2003)
IEE Proceedings: Computers and Digital Techniques
Special issue on "Design and Test Conference in Europe", DATE 03.
IEE Proceedings: Computers and Digital Techniques, 150
(4).
pp. 253-355.
ISSN 1350-2387
Wilcock, R. and Al-Hashimi, B. M.
(2003)
A CAD Methodology for Switched Current IP Cores.
In:
9th IEEE International Conference on Emerging Technologies and Factory Automation, 16-19 September 2003, Lisbon, Portugal. pp. 434-437.
Wu, D., Al-Hashimi, B. M. and Eles, P.
(2003)
Scheduling and Mapping of Conditional Task Graph for the Synthesis of Low Power Embedded Systems.
IEE Proceedings Computers and Digital Techniques, 150
(5).
pp. 262-273.
Wu, D., Al-Hashimi, B. M. and Eles, P.
(2003)
Scheduling and Mapping of Conditional Task Graphs for the Synthesis of Low Power Embedded Systems.
In:
Design, Automation and Test in Europe, 3-7 March 2003, Munich, Germany. pp. 90-95.
2002
(2002)
Low Power Systems-on-Chip.
In:
UNSPECIFIED.
(2002)
Scan Architecture for Shift and Capture Cycle Power Reduction.
In:
International Symposium on Defect and Fault Tolerance in VLSI Systems, November 2002, Vancouver, Canada.
(In Press)
Chang, C. M., Al-Hashimi, B. M., Chen, H. P., Tu, S. H. and Wan, J. A.
(2002)
Current mode single resistance controlled oscillators using only grounded passive components.
Electronics Letters, 38
(19).
pp. 1071-1072.
Gonciari, P. T., Al-Hashimi, B. and Nicolici, N.
(2002)
Improving Compression Ratio, Area overhead, and Test Application Time in System-on-a-Chip Test Data Compression/Decompression.
In:
Proceedings Design, Automation, and Test in Europe (DATE). pp. 604-611.
Gonciari, P. T., Al-Hashimi, B. and Nicolici, N.
(2002)
Reducing Synchronization Overhead in Test Data Compression Environments.
In:
Proceedings IEEE European Test Workshop (ETW).
Gonciari, P. T., Al-Hashimi, B. and Nicolici, N.
(2002)
Useless Memory Allocation: Problems and Solutions.
In:
Proceedings IEEE VLSI Test Symposium (VTS). pp. 423-430.
Gonciari, P. T., Al-Hashimi, B. and Nicolici, N. N.
(2002)
Integrated Test Data Decompression and Core Wrapper Design for Low-Cost System-on-a-Chip Testing.
In:
Proceedings IEEE International Test Conference (ITC). pp. 64-73.
(In Press)
Nicolici, N. and Al-Hashimi, B. M.
(2002)
Power-conscious test synthesis and scheduling.
IEEE Proceedings of Design and Test of Computers, 20
(4).
pp. 48-55.
ISSN 0740-7475
Nicolici, N. and Al-Hashimi, B.
(2002)
Multiple Scan Chains for Power Minimization during Test Application in Sequential Circuits.
In:
UNSPECIFIED. pp. 721-733.
Rosinger, P., Gonciari, P., Al-Hashimi, B. M. and Nicolici, N.
(2002)
Analysing trade-offs in scan power and test data compression for Systems-on-a-chip.
In:
UNSPECIFIED.
Rosinger, P., Al-Hashimi, B. and Nicolici, N.
(2002)
Low Power Mixed-Mode BIST Based on Mask Pattern Generation Using Dual LFSR Re-seeding.
In:
International Conference on computer Design, September 2002, Freiburg.
Rosinger, P., Al-Hashimi, B. and Nicolici, N.
(2002)
Power Profile Manipulation: A New Approach for Reducing Test Application Time Under Power Constraints.
IEEE Transactions on Computer Aided Design of Integrated Circuits
.
Schmitz, M. T., Al-Hashimi, B. M. and Eles, P.
(2002)
Energy-Efficient Mapping and Scheduling for DVS Enabled Distributed Embedded Systems.
In:
Design, Automation and Test Europe Conference (DATE2002), March 2002, Paris, France. pp. 514-521.
Schmitz, M. T., Al-Hashimi, B. M. and Eles, P.
(2002)
Synthesizing Energy-Efficient Embedded Systems with LOPOCOS.
Design Automation for Embedded Systems, 6
.
pp. 401-424.
Schmitz, M. T., Al-Hashimi, B. M. and Eles, P.
(2002)
Energy-Efficient Mapping and Scheduling for DVS Enabled Distributed Embedded Systems.
Schmitz, M. T., Al-Hashimi, B. M. and Eles, P.
(2002)
Synthesising Energy-Efficient Embedded Systems with LOPOCOS.
Varea, M., Al-Hashimi, B. and Leuschel, M.
(2002)
Finite and Infinite Model Checking of Dual Transition Petri Net Models.
In:
Second Workshop on Automated Verification of Critical Systems (AVOCS), 15-16 April 2002, Birmingham, UK. pp. 265-269.
Varea, M., Al-Hashimi, B. M., Cortes, L. A., Eles, P. and Peng, Z.
(2002)
Symbolic Model Checking of Dual Transition Petri Nets.
In:
International Symposium on Hardware/Software Codesign (CODES), 6-8 May 2002, Estes Park, Colorado, USA. pp. 43-48.
Wilcock, R. and Al-Hashimi, B. M.
(2002)
Analogue Filter IP Cores for Design Reuse.
In:
IEE Conference on Analog Signal Processing, November 2002, Oxford, UK. 2.1-2.6.
Wilcock, R. and Al-Hashimi, B. M.
(2002)
A New BIST Methodology for Fully-Balanced OTA-C Filters.
In:
IEEE International Symposium on Circuits and Systems, Phoenix, Arizona.
Xie, Y. and Al Hashimi, B.
(2002)
Synthesis of switched-current Ladder Derived Group delay Equalizers.
In:
Proc. IEE Analog Signal Processing Symposium, 1 November 2002, Oxford, UK. 1/1- 6/1.
2001
Al-Hashimi, B. M. and Xie, Y.
(2001)
Non ideal performance of Bruton transformations switched current wave filters+.
Nicolici, N. and Al-Hashimi, B. M.
(2001)
Testability Trade-offs for BIST RTL Data Paths: The Case for Three Dimensional Design Space.
Nicolici, N. and Al-Hashimi, B. M.
(2001)
Low Power Test Compability Classes.
In:
UNSPECIFIED.
Nicolici, N. and Al-Hashimi, B. M.
(2001)
Minimising power dissipation in partial scan sequential circuits.
Nicolici, N. and Al-Hashimi, B. M.
(2001)
Tackling Test Trade-offs for BIST RTL Data Paths: BIST Area Overhead, Test Application Time and Power Dissipation.
In:
UNSPECIFIED.
Rosinger, P., Al-Hashimi, B. and Nicolici, N.
(2001)
Power Constrained Test Scheduling Using Power Profile Manipulation, ISCAS 2001.
In:
Intl. Symposium on Circuits and Systems 2001. pp. 251-254.
Rosinger, P., Gonciari, T., Al-Hashimi, B. and Nicolici, N.
(2001)
Simultaneous Reduction in Volume of Test Data and Power Dissipation for Systems-on-a-Chip.
IEE Electronics Letters, 37
(24).
pp. 1434-1436.
ISSN 0013-5194
Schmitz, M. T. and Al-Hashimi, B. M.
(2001)
Considering Power Variations of DVS Processing Elements for Energy Minimisation in Distributed Systems.
In:
Inter. Symposium on System Synthesis (ISSS2001), 2001, Montreal, Canada. pp. 250-255.
Schmitz, M. T. and Al-Hashimi, B. M.
(2001)
Considering Power Variations of DVS Processing Elements for Energy Minimisation in Distributed Systems.
In:
Proceedings of 14th International Symposium on System Synthesis. pp. 250-5.
Schmitz, M. T., Al-Hashimi, B. M. and Eles, P.
(2001)
Co-Synthesis with Energy Minimisation for Heterogeneous Distributed Systems containing Power Managed
Processing Elements.
Varea, M. and Al-Hashimi, B.
(2001)
Embedded Systems Modelling and Validation based on Extended Petri Nets.
In:
1st U.K. SIGDA Workshop on Design Automation, 10 September 2001, London, UK.
Varea, M. and Al-Hashimi, B. M.
(2001)
Dual Transitions Petri Net based Modelling Technique for Embedded Systems Specification.
In:
Conference on Design, Automation and Test in Europe (DATE), 13-16 March 2001, Munich, Germany. pp. 566-571.
2000
Al-Hashim, B. M., Dudek, F. and Moniri, M.
(2000)
Current mode group delay equalisation using pole-zero mirroring techniques.
In:
UNSPECIFIED. pp. 257-63.
Al-Hashimi, B. M., Dudek, F. and Sun, Y.
(2000)
CMOS Design of Group Delay Equaliser.
In:
UNSPECIFIED. pp. 163-169.
Al-hashimi, B. and Nicolici, N.
(2000)
Low Power Testing of Digital ICs: Overview.
In:
UNSPECIFIED. pp. 3-4.
Dudek, F., Al-Hashimi, B. M. and Moniri, M.
(2000)
Current Mode Elliptic Filter Design Based on Symmertical Current Switching.
In:
UNSPECIFIED. pp. 163-77.
Gonciari, P. T. and Al-Hashimi, B. M.
(2000)
Modified Isolation Rings for Parallel Test Access in Core Based SoC.
In:
IEE System on a Chip Workshop. 10/1-10/4.
Nicolici, N., Al-Hashimi, B. M., Brown, A. D. and Williams, A. C.
(2000)
BIST Hardware Synthesis for RTL Data Paths Based on Test Compatibility Classes.
IEEE Transactions on CAD, 19
(11).
pp. 1375-1385.
Nicolici, N., Al-Hashimi, B. M. and Williams, A. C.
(2000)
Mimimising Power Dissipation During Test Application in Full Scan Sequential Circuits by Primary Input Freezing.
IEE Proceedings - Computers and Digital Techniques, 147
(5).
pp. 313-322.
Nicolici, N. and Al-Hashimi, B. M.
(2000)
Power Minimisation Techniques for Testing Low Power VLSI Circuits.
In:
IEE Postgraduate Research and Electronics and Photonics (PREP). pp. 7-12.
Nicolici, N. and Al-Hashimi, B. M.
(2000)
Power Conscious Test Synthesis and Scheduling.
In:
IEEE International Test Conference (ITC). pp. 662-671.
Nicolici, N. and Al-Hashimi, B. M.
(2000)
Scan Latch Partitioning into Multiple Scan Chains for Power Minimization in Full Scan Sequential Circuits.
In:
IEEE/ACM Design, Automation and Test in Europe (DATE). pp. 715-722.
Schmitz, M. T. and Al-Hashimi, B. M.
(2000)
Energy Minimisation for Processor Cores using Variable Supply Voltages.
In:
IEE System on a Chip Workshop. 10/1-10/4.
Schmitz, M. T. and Al-Hashimi, B. M.
(2000)
Low Power Process Assignment for Distributed Embedded Systems using Dynamic Voltage Scaling.
In:
IEE Hardware-Software Co-Design. 7/1-7/4.
1999
Dudek, F., Al-Hashimi, B. M. and Moniri, M.
(1999)
Compensation of non-ideal effects in video frequency sinc(x) equalisers using tunable gm_c structure.
In:
UNSPECIFIED. pp. 148-51.
Kollig, P. and Al-Hashimi, B. M.
(1999)
Reduction of latency and resource usage in bit-level pipelined data ptahs for FPGAs.
Lancaster, J. and Al-Hashimi, B. M.
(1999)
Efficient Switched Current Wave Elliptic Filters Based on Direct and Inverse Bruton Transformations.
In:
UNSPECIFIED. pp. 235-241.
Living, J. and Al-Hashimi, B. M.
(1999)
Architecture-mapped concurrent-transform programmable 2D FIR filters for serial image processing.
In:
UNSPECIFIED. pp. 112-116.
Living, J. and Al-Hashimi, B. M.
(1999)
Mixed arithmetic architecture: a solution to the iteration bound for resources FPGA and CPLD recursive digital filters.
In:
IEEE International Symposium on Circuits and Systems, USA. pp. 478-81.
Living, J. and Al-Hashimi, B. M.
(1999)
New resource saving differential coefficient coding algorithm for recursive FIR filter design.
In:
IEEE International Symposium on Circuits and Systems, USA. pp. 478-81.
Living, J. and Al-Hashimi, B. M.
(1999)
FPGA based video signal decimators for sample rate reduction from 27/28.64 MHz to 13.5/14.32 MHz.
In:
UNSPECIFIED. pp. 38-42.
Nicolici, N. and Al-Hashimi, B. M.
(1999)
Efficient BIST hardware insertion with low test application time for synthesized data paths.
In:
IEEE/ACM Design, Automation and Test in Europe. pp. 289-295.
1998
AL-HASHIMI, B. M., DUDEK, F., MONIRI, M. and LIVING, J.
(1998)
Integrated universal biquad based on triple-output OTAs and using digitally programmable zeros.
Dudek, F., AL-Hashimi, B. M. and Moniri, M.
(1998)
Analysis and compensation of OTA non-ideal effects in video frequency CMOS sinc(x) equaliers.
In:
UNSPECIFIED. pp. 294-297.
Kollig, P. and Al-Hashimi, B. M.
(1998)
ARGEN: A behavioral level compiler for hardware realisation of DSP systems.
In:
UNSPECIFIED.
Lancaster, J., Al-Hashimi, B. M. and Moniri, M.
(1998)
Efficient design of switched current lowpass elliptic filters using Bruton transformations.
In:
UNSPECIFIED. pp. 115-18.
Living, J., AL-Hashimi, B. M. and Moniri, M.
(1998)
High performance distributed arithmetic FPGA decimators for video frequency applications.
In:
UNSPECIFIED. pp. 294-297.
Nicolici, N. and Al-hashimi, B. M.
(1998)
Correction to the proof of theorem 2 in "Parallel signature analysis design with bounds on aliasing".
IEEE Trans on Computers, 47
(12).
pp. 1426-7.
ISSN 0018-9340
Somerset, W., Al-Hashimi, B. M. and Moniri, M.
(1998)
Constrained genetic algorithm design of finite precision FIR linear phase raised cosine filters.
In:
UNSPECIFIED. pp. 445-8.
1997
Dudek, F., Al-Hashimi, B. M. and Moniri, M.
(1997)
CMOS equaliser for compensating sinc(x) distortion of video D/A converters.
Kollig, P. and Al-Hashimi, B. M.
(1997)
Simultaneous scheduling, allocation and binding in high level synthesis ndwidth.
Kollig, P. and Al-Hashimi, B. M.
(1997)
FPGA Implementation of high performance FIR Filters.
In:
UNSPECIFIED. pp. 2240-43.
Kollig, P., al-hashimi, b. m. and abbott, k. m.
(1997)
Efficient scheduling of behavioral descriptions in high-level synthesis.
Moniri, M. and al-hashimi, b. m.
(1997)
Systematic generation of current mode dual ouput OTA filters using a building block approach.
1996
Al-Hashimi, B.
(1996)
current mode filter structure based on dual output transconductance amplifiers.
Al-Hashimi, B. M.
(1996)
The Electroincs Handbook.
pp. 1986-2004, CRC Press in cooperation with IEEE Press.
ISBN 0849383455
Al-Hashimi, B. M.
(1996)
New dual output transconductance amplifier based biquad.
In:
UNSPECIFIED. pp. 1200-1204.
AL-HASHIMI, B. M.
(1996)
Understand the Fundamental of Passive Video Filters.
Microwave & RF, 35
(5).
pp. 171-78.
Holdcroft, D., Moniri, M. and AL-Hashimi, B. M.
(1996)
Comparative study of recursive digital filters using Z and delta operators.
In:
UNSPECIFIED. pp. 91-6.
Kollig, P. and AL-Hashimi, B. M.
(1996)
Design and implementation of digital systems for automatic control based on behavioral descriptions.
In:
UNSPECIFIED. pp. 21-4.
Lind, L. F., Al-Hashimi, B. M. and Somerset, W. P.
(1996)
Linear programming design of FIR raised cosine filters with >100% excess bandwidth.
Moniri, M. and Al-Hashimi, B. M.
(1996)
Generation of current mode filter structures using dual output transconductance amplifiers.
In:
UNSPECIFIED. pp. 903-906.
Somerset, W., Al-Hashimi, B. M. and Moniri, M.
(1996)
A computer program for the design and analysis of linear phase FIR raised cosine filters.
In:
UNSPECIFIED. pp. 627-30.
1995
Al-Hashimi, B. M.
(1995)
The Art of SPICE Simulation: Analog and Digital.
p. 250, CRC Press, The Art of SPICE Simulation: Analog and Digital.
ISBN 0849378958
Al-Hashimi, B. M.
(1995)
Behavioral models of electronic filters.
In:
UNSPECIFIED. pp. 51-5.
AL-Hashimi, B. M.
(1995)
Current mode filters: design, simulation and implementation.
In:
UNSPECIFIED. pp. 61-5.
1991
Al-Hashimi, B. M.
(1991)
On the implementation of video filters using current feedback amplifiers.
In:
UNSPECIFIED. pp. 1154-1158.
1990
Al-Hashimi, B. M. and Fidler, J. K.
(1990)
Novel high frequency continuous time lowpass OTA based filters.
In:
UNSPECIFIED. pp. 1171-1173.
Al-Hashimi, B. M. and Holden, A. G.
(1990)
On the practical implementation of high performance active audio filters using the FDNR concept.
In:
UNSPECIFIED.
This list was generated on Fri Feb 10 01:05:54 2012 GMT.