Number of items: 136.
2011
Ahmadi, Arash, Mangieri, Eduardo, Maharatna, Koushik, Dasmahapatra, Srinandan and Zwolinski, Mark (2011) On the VLSI Implementation of Adaptive-Frequency Hopf Oscillator. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS, 58, (7)
Ahmadi, Arash and Zwolinski, Mark (2011) Fixed-Point Multiplication: A Probabilistic Bit-Pattern View. Microelectronics Reliability, 51, (4), . (Submitted)
Merrett, M., Asenov, P., Wang, Yangang, Zwolinski, M., Reid, D., Millar, C., Roy, S., Liu, Zhenyu, Furber, S. and Asenov, A. (2011) Modelling circuit performance variations due to statistical variability: Monte Carlo static timing analysis. At Design, Automation Test in Europe Conference Exhibition (DATE), 2011 , .
Kulakov, Anton and Zwolinski, Mark (2011) Combining Hebbian and Reinforcement Methods in a Biologically-inspired Adaptive Agent. In, 3rd International Conference on Machine Learning and Computing,
Kulakov, Anton and Zwolinski, Mark (2011) Reducing the Active Paths Interference in the Chialvo-Bak “Minibrain” Model. International Journal of Modeling and Optimization
Suresh, L., Rameshan, N., Gaur, M.S., Zwolinski, M. and Laxmi, V. (2011) Acceleration of Functional Validation using GPGPU. At Proceedings of the 2011 IEEE 6th International Workshop on Electronic Design, Test and Application (DELTA 2011) IEEE Computer Society, .
2010
Al-Sulaifanie, Ahmed, Ahmadi, Arash and Zwolinski, Mark (2010) Very Large Scale Integration Architecture for Integer Wavelet Transform. IET Computers & Digital Techniques, 4, (6), .
Bushager, Aisha and Zwolinski, Mark (2010) Modelling Smart Card Security Protocols in SystemC TLM. In, Embedded and Ubiquitous Computing (EUC), 2010 IEEE/IFIP 8th International Conference on IEEE Computer Society, .
Wang, Yangang, Merrett, M. and Zwolinski, M. (2010) Statistical power analysis for nanoscale CMOS. At 2010 International Conference on Signals and Electronic Systems (ICSES) IEEE, .
Merrett, Michael, Wang, Yangang, Zwolinski, Mark, Maharatna, Koushik and Alioto, Massimo (2010) Design Metrics for RTL level estimation of delay variability due to intradie (random) variations. In, ISCAS, Paris, (Submitted)
Nechma, Tarek, Zwolinski, Mark and Reeve, Jeff (2010) Parallel Sparse Matrix Solver for Direct Circuit Simulations on FPGAs. In, ISCAS, Paris, (Submitted)
Ahmadi, Arash and Zwolinski, Mark (2010) A Modified Izhikevich Model For Circuit Implementation of Spiking Neural Networks. In, LASCAS 2010: IEEE Latin American Symposium on Circuit and system, Brasil, 24 - 26 Feb 2010.
Zwolinski, Mark (2010) Multi-Threaded Circuit Simulation using OpenMP. In, LASCAS 2010: IEEE Latin American Symposium on Circuits and Systems, Brasil, 24 - 26 Feb 2010.
Brown, Andrew D., Furber, Steven B., Reeve, Jeff S., Wilson, Peter R., Zwolinski, Mark, Chad, John E., Plana, Luis and Lester, David R. (2010) A communication infrastructure for a million processor machine. At Proceedings of the 7th ACM international conference on Computing frontiers ACM, .
2009
Maache, Ahmed, Reeve, Jeff and Zwolinski, Mark (2009) Optimising Physical Wires Usage in Mesh-based Multi-FPGA Systems using Partition Swapping. At 21st International Conference on Microelectronics (ICM09), 19 - 22 Dec 2009.
Maache, Ahmed, Reeve, Jeff and Zwolinski, Mark (2009) Accelerating CMOS Device Model Evaluation Using Multi-FPGA Systems. At Fifth UK Embedded Forum, Leicester, UK, 23 - 24 Sep 2009.
Ahmadi, Arash, Mangieri, Eduardo, Maharatna, Koushik and Zwolinski, Mark (2009) Physical Realizable Circuit Structure For Adaptive Frequency Hopf Oscillator. In, NEWCAS-TAISA'09, Toulouse, France, 28 Jun - 01 Jul 2009. IEEE.
Wang, Yangang and Zwolinski, Mark (2009) Analytical Transient Response and Propagation Delay Model for Nanoscale CMOS Inverter. At ISCAS, Taipei. , Taiwan,
Mishra, B, Al-Hashimi, Bashir and Zwolinski, Mark (2009) Variation Resilient Adaptive Controller for Subthreshold Circuits. In, DATE, 2009, Nice, France, 20 - 24 Apr 2009. (Submitted)
Sokolovic, Miljana, Litovski, Vanco and Zwolinski, Mark (2009) New concepts of worst-case delay and yield estimation in asynchronous VLSI circuits. Microelectronics Reliability, 49, (2), .
Ahmadi, Arash and Zwolinski, Mark (2009) Symbolic Error Analysis In Digital Computation. At 3rd MRS Network Workshop - Numerical Accuracy and Reliability, Queen's University Belfast, UK,
Sokolovic, M, Litovski, V and Zwolinski, M (2009) Efficient and realistic statistical worst case delay computation using VHDL. Electrical Engineering, 91, (4-5), .
2008
Wang, Yangang, Zwolinski, Mark and Merrett, Michael (2008) Behavioural modelling for stability of CMOS SRAM cells subject to random discrete doping. In, IEEE Inernational Behavioral Modeling and Simulation Workshop (BMAS), San Jose, CA, USA,
Ahmadi, Arash and Zwolinski, Mark (2008) On The Probability Distribution Of Fixed-Point Multiplication. In, IEEE International Conference on Electronics Circuits and Systems, IEEE, .
Ahmadi, Arash and Zwolinski, Mark (2008) Symbolic Noise Analysis Approach to Computational Hardware Optimization. In, Design Automation Conference (DAC), 09 - 13 Jun 2008. IEEE, .
Zain Ali, Noohul Basheer, Zwolinski, Mark and Ahmadi, Arash (2008) Delay Fault Modelling/Simulation using VHDL-AMS in Multi-Vdd Systems. In, 26th International Conference on Microelectronics, Nis, Serbia, 11 - 14 May 2008.
Baddam, Karthik and Zwolinski, Mark (2008) Path switching: a technique to tolerate dual rail routing imbalances. Design Automation for Embedded Systems
Sokolovic, Miljana, Litovski, Vanco and Zwolinski, Mark (2008) New concepts of worst-case delay evaluation in asynchronous VLSI SoC. In, 26th International Conference on Microelectronics (MIEL 2008), Nis, Serbia, 11 - 14 May 2008.
Baddam, Karthik and Zwolinski, Mark (2008) Divided Backend Duplication Methodology for Balanced Dual Rail Routing. In, Workshop on Cryptographic Hardware and Embedded Systems 2008 (CHES 2008)
Wang, YG and Zwolinski, M (2008) Impact of NBTI on the Performance of 35nm CMOS Digital Circuits. 2008 9TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED-CIRCUIT TECHNOLOGY, VOLS 1-4, .
2007
Zain Ali, Noohul Basheer, Zwolinski, Mark and Al-Hashimi, Bashir (2007) Testing of Level Shifters in Multiple Voltage Designs. At 14th IEEE International Conference on Electronics, Circuits and Systems, 11 - 14 May 2007.
Ahmadi, Arash and Zwolinski, Mark (2007) A Symbolic Noise Analysis Approach to Word-Length Optimization in DSP Hardware. In, International Symposium on Integrated Circuits (ISIC 2007), 26 - 28 Sep 2007. IEEE, .
Asgary, Reza, Mohammadi, Karim and Zwolinski, Mark, Stojadinovic, N (ed.) (2007) Using neural networks as a fault detection mechanism in MEMS devices. Microelectronic Reliability, 47, (1), .
Baddam, K. and Zwolinski, M. (2007) Evaluation of dynamic voltage and frequency scaling as a differential power analysis countermeasure. At 2007 20th International Conference on VLSI Design IEEE Comput. Soc.
Ahmadi, Arash and Zwolinski, Mark (2007) Multiple-Width Bus Partitioning Approach to Datapath Synthesis. In, IEEE International Symposium on Circuits and Systems (ISCAS), New Orleans, USA, 27 - 30 May 2007. IEEE, .
Ahmadi, Arash and Zwolinski, Mark (2007) MW²P-Bus: A New Bus Structure for Datapath Synthesis. In, 3rd UK Embedded Forum, Durham, UK, 02 - 03 Apr 2007. IET.
Ahmadi, Arash and Zwolinski, Mark (2007) A New Structure for Datapath Synthesis. In, 12th International CSI Computer Conference 20 - 22 Feb 2007.
2006
Oikonomakos, Petros and Zwolinski, Mark, Jha, Niraj (ed.) (2006) An Integrated High-level On-line Test Synthesis Tool. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 25, (11), .
Oikonomakos, Petros and Zwolinski, Mark (2006) On the Design of Self-checking Controllers with Datapath Interactions. IEEE Transactions on Computers, 55, (11), .
Litovski, V, Andrejevic, M and Zwolinski, M, Stojadinovic, N (ed.) (2006) Analogue electronic circuit diagnosis based on ANNs. Microelectronic Reliability, 46, (8), .
Andrejevic, M, Litovski, V and Zwolinski, M (2006) Fault diagnosis in digital part of mixed-mode circuit. In, 25TH INTERNATIONAL CONFERENCE ON MICROELECTRONICS, Belgrade, Serbia, 14 - 17 May 2006. IEEE, .
Ahmadi, Arash and Zwolinski, Mark (2006) Word-Length Oriented Multiobjective Optimization of Area and Power Consumption in DSP Algorithm Implementation. In, 2006 25th International Conference on Microelectronics, Belgrade and Montenegro, Serbia, 14 - 17 May 2006. IEEE, .
Wilson, Peter R, Al Hashimi, Bashir, Brown, Andrew D and Zwolinski, Mark (2006) A Masters Course in System on Chip. In, European Workshop on Microelectronics Education, Stockholm, , .
Zain Ali, Noohul Basheer, Zwolinski, Mark, Al-Hashimi, Bashir M and Harrod, Peter (2006) Dynamic Voltage Scaling Aware Delay Fault Testing. In, European Test Symposium, Southampton, 21 - 25 May 2006.
2005
Ahmadi, Arash and Zwolinski, Mark (2005) Area Word-Length Trade off in DSP Algorithm Implementation and Optimization. In, IEE/EURASIP Conference on DSPenabledRadio, Southampton, UK, 19 - 20 Sep 2005. , .
Litovski, V, Andrejević, M and Zwolinski, M (2005) Behavioural Modelling, Simulation, Test and Diagnosis of MEMS using ANNs. In, International Symposium on Circuits and Systems, Kobe, Japan, 23 - 26 May 2005. IEEE.
Yee, Tack Boon, Zwolinski, Mark and Brown, Andrew D (2005) Multi-FPGA Synthesis with Asynchronous Communication Subsystems. In, IFIP International Conference on Very Large Scale Integration (VLSI-SOC 2005)
Zwolinski, M and Reeve, JS (2005) Behavioural synthesis of an adaptive Viterbi decoder. In, DSPenabledRadio, 2005. The 2nd IEE/EURASIP Conference on, Southampton, UK, 19 - 20 Sep 2004. IEE.
2004
Litovski, VB, Litovski, IV and Zwolinski, M (2004) Concurrent analogue fault simulation, the equation formulation aspect. INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS, 32, (6), .
Kilic, Y and Zwolinski, M (2004) Behavioral fault modeling and simulation using VHDL-AMS to speed-up analog fault simulation. Analog Integrated Circuits and Signal Processing, 39, (2), .
Milton, DJD, Brown, AD, Zwolinski, M and Wilson, PR (2004) Behavioural synthesis utilising dynamic memory constructs. IEE PROCEEDINGS-COMPUTERS AND DIGITAL TECHNIQUES, 151, (3), .
Spinks, SJ, Chalk, CD, Bell, IM and Zwolinski, M (2004) Generation and Verification of Tests for Analog Circuits Subject to Process Parameter Deviations. Journal of Electronic Testing: Theory and Applications, 20, (1), .
Zwolinski, M. (2004) Digital System Design with VHDL 2nd Edition, Pearson Education
Brown, AD and Zwolinski, M (2004) Behavioural modelling of analogue faults in VHDL-AMS - A case study. In, 2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, Vancouver, Canada, 23 - 26 May 2004. IEEE, .
Crutchley, DA and Zwolinski, M (2004) DC operating point analysis using evolutionary computing. In, 24th International Conference on Microelectronics (MIEL 2004), Nis and Montenegro, Serbia, IEEE, .
Gaur, MS and Zwolinski, M (2004) Integrating Self Testability with Design Space Exploration by a Controller based Estimation Technique. In, 17th International Conference on VLSI Design (VLSID’04), Mumbai, India, IEEE, .
Litovski, V, Andrejevic, M and Zwolinski, M (2004) ANN based modeling, testing and diagnosis of MEMS. In, NEUREL 2004: SEVENTH SEMINAR ON NEURAL NETWORK APPLICATIONS IN ELECTRICAL ENGINEERING, Belgrade, Serbia, 23 - 25 Sep 2004. IEEE, .
2003
Zwolinski, M and Gaur, M S (2003) Integrating testability with design space exploration. Microelectronics Reliability, 43, (5), .
Al-Hashimi, Bashir, Xie, Yan and Zwolinski, Mark (2003) Analysis of mirror mismatch and clock-feedthrough in Brouton transformation switched current wave filters. IEE Proceedings- Circuits, Devices and Systems, 150, (1), .
Crutchley, Duncan and Zwolinski, Mark (2003) Globally convergent algorithms for dc operating point analysis of nonlinear circuits. IEEE Transactions on Evolutionary Computing, 7, (1), .
Brown, AD and Zwolinski, M (2003) The continuous-discrete interface - What does this really mean? - Modelling and simulation issues. In, IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, Bangkok, Thailand, 25 - 28 May 2003. IEEE, .
Gaur, Manoj Singh, Zwolinski, Mark and Al-Hashimi, Basheer (2003) Concurrent Optimisation of Self-testable Designs from Behavioural Descriptions by Controller based Estimation Technique. At IEEE European Test Workshop, Mastricht, The , Netherlands, 25 - 28 May 2003.
Oikonomakos, P., Zwolinski, M. and Al-Hashimi, B. M. (2003) Versatile High-Level Synthesis of Self-Checking Datapaths Using an On-Line Testability Metric. Design Automation and Test in Europe (DATE), Munich, 03 - 07 Mar 2003. ACM/IEEE, .
Oikonomakos, Petros and Zwolinski, Mark (2003) Controller Self-checking in a Controller / Datapath Architecture. 3rd SIGDA UK Workshop on Electronic Design Automation, Southampton, UK, 11 - 12 Sep 2003.
Oikonomakos, Petros and Zwolinski, Mark (2003) Foundation of Combined Datapath and Controller Self-checking Design. 9th IEEE International On-Line Testing Symposium, Kos Island, Greece, 07 - 09 Jul 2003. IEEE Computer Society, .
2002
Gaur, Manoj Singh and Zwolinski, Mark (2002) UNIFIED BIST AND FUNCTIONAL OPTIMISATION IN BEHAVIOURAL SYNTHESIS.
Crutchley, D A and Zwolinski, M (2002) Using Evolutionary and Hybrid Algorithms for DC Operating Point Analysis of Nonlinear Circuits. IEEE World Congress on Computational Intelligence - Congress on Evolutionary Computation , .
Kilic, Yavuz and Zwolinski, Mark (2002) Behavioural Fault Modelling using VHDL-AMS and Slow Transient Analysis with hAMSter Simulator to Speed-up Analogue Fault Simulation. European Test Workshop
Forcer, T M, Nixon, M S and Zwolinski, M (2002) An integrated framework for digital electronics education - programmable logic and IC design tools. Engineering Education 2002 - Professional Engineering Scenarios The Institution of Electrical Engineers, .
Oikonomakos, Petros and Zwolinski, Mark (2002) High-Level Synthesis for On-Line Testability. Postgraduate Research in Electronics, Photonics, communications and software, Nottingham, UK, 17 - 19 Apr 2002.
Oikonomakos, Petros and Zwolinski, Mark (2002) On-Line Testability in a Transformation-Based and Cost Function-Driven High-Level Synthesis Environment. At UK ACM SIGDA Workshop on Electronic Design Automation, Bournemouth, 16 - 17 Sep 2002.
Oikonomakos, Petros and Zwolinski, Mark (2002) Transformation Based Insertion of On-Line Testing Resources in a High-Level Synthesis Environment. At IEEE International On-Line Testing Workshop, Isle of Bendor, France, 08 - 10 Jul 2002. IEEE Computer Society, .
Wilson, Peter R, Kilic, Yavuz, Ross, J. Neil, Zwolinski, Mark and Brown, Andrew D. (2002) Behavioural Modelling of Operational Amplifier Faults using VHDL-AMS. In, Design, Automation and Test in Europe , .
2001
Oikonomakos, Petros and Zwolinski, Mark (2001) Using High-Level Synthesis to Implement On-Line Testability. IEEE Real-Time Embedded Systems Workshop
Kilic, Y. and Zwolinski, M. (2001) Behavioural/Macro Modelling To Speed-Up Analogue Fault Simulation. Proceedings of ELECO'01
Crutchley, D. and Zwolinski, M. (2001) Globally Convergent Algorithms for DC Operating Point Analysis of Nonlinear Circuits.
Esrafili-Gerdeh, D. and Zwolinski, M. (2001) Synthesis of Reconfigurable Systems.
Gaur, M.S. and Zwolinski, M. (2001) High Level BIST Insertion with Multiple Objective Optimisation.
Lawrence, B. and Zwolinski, M. (2001) Interconnect Prediction and its Role in High Level Synthesis.
Zwolinski, M. (2001) A Technique for Transparent Fault Injection and Simulation. Microelectronics and Reliability, 41, (6), .
Kilic, Y. and Zwolinski, M. (2001) Speed-up Techniques for Fault-based Analogue Fault Simulation. Proceedings of ETW'01
Kilic, Yavuz and Zwolinski, Mark (2001) Process variation independent built-in current sensor for analogue built-in self-test. International Symposium on Circuits and Systems IEEE, .
Zwolinski, Mark and Allen, Robin W. (2001) Practical algorithms for fully decoupled mixed-mode simulation of electronic circuits. International Symposium on Circuits and Systems IEEE, .
Zwolinski, M. and Yang, Z.R. (2001) Mutual Information Theory for Adaptive Mixture Models. IEEE Transactions on Pattern Analysis and Machine Intelligence, 23, (4), .
Wilson, P R, Kilic, Y, Ross, J N, Zwolinski, M and Brown, A D (2001) Behavioural Modelling of Operational Amplifier Faults using analogue Hardware Description Languages. In, Behavioral Modeling and Simulation Workshop
2000
Zwolinski, M. and Lam, Y. (2000) Analog Circuit Synthesis With Over-designed Circuits. Asia Pacific Conference on Circuits and Systems
Zwolinski, M., Yang, Z.R. and Kazmierski, T.J. (2000) Applying Mutual Information Theory to Behavioural Analogue Fault Modelling. International Journal of Electronics, 87, (12), .
Williams, A.C., Brown, A.D. and Zwolinski, M. (2000) Simultaneous Optimisation of Dynamic Power, Area and Delay in Behavioural Synthesis. IEE Proceedings on Computers and Digital Techniques, 147, (6), .
Zwolinski, M., Crutchley, D. and Yang, Z.R. (2000) Evolutionary Computing for Operating Point Analysis of Nonlinear Circuits. International Conference on Signals and Electronic Systems (ICSES)
Zwolinski, M. and Kilic, Y. (2000) Closeness Measurement in Concurrent Analogue Fault Simulation. International Conference on Signals and Electronic Systems (ICSES)
Williams, A.C., Brown, A.D. and Zwolinski, M. (2000) A VHDL Behavioural Synthesis System Featuring Simultaneous Optimisation of Dynamic Power, Area and Delay. UNSPECIFIED , .
Zwolinski, M. (2000) A Technique for Transparent Fault Injection and Simulation in VHDL. Small System Simulation Symposium (SSSS)
Zwolinski, M (2000) Digital System Design with VHDL, Pearson Education
Williams, A.C., Brown, A.D. and Zwolinski, M. (2000) In-line Test of Synthesised Systems Exploiting Latency Analysis. IEE Proceedings on Computers and Digital Techniques, 147, (1), .
Yang, Z R, Zwolinski, M, Chalk, C D and Williams, A C (2000) Applying a Robust Heteroscedastic Probabilistic Neural Network to Analog Fault Detection and Classification. Transactions on Computer-Aided Design of Integrated Circuits and Systems, 19, (1), .
Kilic, Yavuz and Zwolinski, Mark (2000) Concurrent Transient Fault Simulation of Nonlinear Analogue Circuits. 6th International Mixed-Signal Testing Workshop
Zwolinski, M, Yang, Z R and Kazmierski, T J (2000) Using robust adaptive mixing for statistical fault macromodelling. IEE Proc. Circuits Devices & Syst., 147, (Issue ), .
1999
Kilic, Y., Chalk, C.D. and Zwolinski, M. (1999) Design and Realisation of a New Built-In Current Sensor for Mixed-Signal IDDD Test. UNSPECIFIED , .
Kilic, Y. and Zwolinski, M. (1999) Testing analog circuits by supply voltage variation and supply current monitoring. UNSPECIFIED , .
Lam, Y. and Zwolinski, M. (1999) Topology Selector for Analogue Circuits. UNSPECIFIED , .
Wong, S.C., Brown, A.D. and Zwolinski, M. (1999) Simulation of losses in resonant converter circuits. International Journal of Electronics, 86, (6), .
Yang, Z.R. and Zwolinski, M. (1999) Fast, robust DC and transient fault simulation for nonlinear analogue circuits. UNSPECIFIED , .
Zwolinski, M. and Tan, C.H. (1999) Characterisation of Analog Macromodels under Fault Conditions using a Probabilistic Neural Network. UNSPECIFIED , .
1998
Bell, I.M., Spinks, S.J., Taylor, D., Milne, A., Zwolinski, M. and Chalk, C.D. (1998) A Comparison of Structural Analogue Testing Techniques. UNSPECIFIED
Chalk, C. and Zwolinski, M. (1998) A Design for Test Technique to Increase the Resolution of Analogue Supply Current Tests. UNSPECIFIED
Lechner, A., Perkins, A., Richardson, A., Zwolinski, M. and Hermes, B. (1998) Design for Testability Strategies for a High Performance Automatic Gain Control Circuit. UNSPECIFIED
Perkins, A.J., Zwolinski, M., Chalk, C.D. and Wilkins, B.R. (1998) Fault Modeling And Simulation Using VHDL-AMS. Analog Integrated Circuits and Signal Processing, 16, (2)
Yang, Z. R., Zwolinski, M. and Chalk, C.D. (1998) Fault Detection and Classification in Analogue Integrated Circuits using Robust Heteroscedastic Probabilistic Neural Networks. UNSPECIFIED
Yang, Z.R. and Zwolinski, M. (1998) A Methodology for Statistical Behavioral Fault Modeling. UNSPECIFIED
Yang, Z.R., Zwolinski, M. and Chalk, C.D. (1998) Bootstrap, an alternative to Monte Carlo simulation. Electronics Letters, 34, (12)
1997
Zwolinski, M., Brown, A.D. and Chalk, C. (1997) Concurrent analogue fault simulation.
Chalk, C., Zwolinski, M. and Wilkins, B.R. (1997) Test Stimulus Generation for Steady-State Analysis of Analogue and Mixed-signal Circuits.
Chalk, C.D. and Zwolinski, M. (1997) A Design for Test Technique to Increase the Resolution of Supply Current Monitoring in Analogue Circuits. Electronics Letters, 33, (21)
Chalk, C.D. and Zwolinski, M. (1997) A DfT Technique to Increase the Resolution of AC RMS Supply Current Monitoring of Complex Analogue Circuits.
Lam, Y. and Zwolinski, M. (1997) An Analogue Circuit Optimiser.
Lam, Y. and Zwolinski, M. (1997) Analogue Circuit Synthesis from Performance Specifications.
Litovski, V. and Zwolinski, M. (1997) VLSI Circuit Simulation and Optimization, Chapman and Hall
Spinks, S.J., Chalk, C.D., Zwolinski, M. and Bell, I.M. (1997) Generation and Verification of Tests for Analogue Circuits Subject to Process Parameter Deviations.
Zwolinski, M., Chalk, C.D. and Perkins, A.J. (1997) Multi-Level Fault Modeling Of Analog Circuits.
1996
Brown, A.D., Nichols, K.G. and Zwolinski, M. (1996) Issues in the design of a logic simulator: element modelling for efficiency. IEE proceedings on Circuits, Devices and Systems, IEE CD, (1), .
Zwolinski, M., Chalk, C. and Wilkins, B. R. (1996) Analogue Fault Modelling and Simulation for Supply Current Monitoring. European Design and Test Conference, .
Zwolinski, M., Chalk, C., Wilkins, B.R. and Suparjo, B.S. (1996) Analogue Circuit Test using RMS Supply Current Monitoring.
1995
Zwolinski, M., Garagate, C., Mrcarica, Z., Kazmierski, T. J. and A.D, Brown (1995) Anatomy of a simulation backplane. IEE Proc.-Comput. Digit. Tech,, Vol. 1
Brown, AD, Nichols, KG and Zwolinski, M (1995) Issues in the design of a logic simulator: an improved caching technique for event-queue management. IEE PROCEEDINGS-CIRCUITS DEVICES AND SYSTEMS, 142, (5), .
Chalk, C and Zwolinski, M (1995) Macromodel of CMOS operational amplifier including supply current variation. Electronics Letters, 171, (31), .
Baker, K R, Zwolinski, M and Brown, A D (1995) Concurrent Testing of Latent Modules in Synthesized Systems. 1st IEEE International On-Line Testing Workshop, Nice, France, IEEE, .
1994
Zwolinski, M., Garagate, C. and Kazmierski, T. J. (1994) Mixed-signal simulation using the ALFA simulation backplane. Proc. IEE Coll. on Mixed Mode Modelling and Simulation, London
Zwolinski, M. and Kazmierski, T. J. (1994) Modelling in VHDL-A,. Proc. IEE Coll. on Mixed Mode Modelling and Simulation, London
Nichols, K G, Kazmierski, T J, Brown, A D and Zwolinski, M (1994) Overview of SPICE simulation algorithms. IEE Proc. Circuits, Devices and Systems, v. 141, (no. 4), .
1993
Nichols, K.G., Kazmierski, T J, Zwolinski, M and Brown, A D (1993) Reliability of circuit-level simulation,. Proc. IEE Colloquium on SPICE IEE.
1992
Baker, KR and Zwolinski, M (1992) Interleaving: An Additional Topological Compaction Technique for Weinberger Array Generation. Computer-Aided Design, 24, (3), .
Brown, A. D., Zwolinski, M., Nichols, K. G. and Kazmierski, T J (1992) Confidence in Mixed-mode Circuit Simulation. Computer-Aided Design, v. 24, (2), .
Kazmierski, T J, Nichols, K G, Brown, A D and Zwolinski, M (1992) A general-purpose network solving system. In, Halaas, A. and P.B. Denyer, (eds.) UNSPECIFIED IFIP Transactions , North-Holland,. (A1).
Zwolinski, M., Glaser, H. and Peh, K. (1992) Circuit Simulation - A Functional Programming Approach. Research Journal Dept. of Electronics and Computer Science, University of Southampton, UK, .
1990
Brown, A D, Zwolinski, M and Redman-White, W (1990) Mixed mode simulation of oversampled A/D converters. UNSPECIFIED
1989
Miller, PR, Zwolinski, M and Jesshope, CR (1989) Using Ella As A Design Tool. INTERNATIONAL JOURNAL OF ELECTRICAL ENGINEERING EDUCATION, 26, (1-2), .
This list was generated on Wed May 23 04:52:16 2012 BST.
