Professor Peter Ashburn: Research and Projects

Innovations in nanoelectronics technology often arise through new developments in physics and materials science, SiGe technology being a perfect example. My research team is therefore continuing to do basic research in physics and materials science for application in new types of silicon electronic device. My current research interests cover the following projects: 

1. Surround gate vertical MOSFETs: we are developing novel architectures for vertical MOSFETs for reducing overlap capacitance and suppressing short-channel effects. Application of vertical MOSFETs in radio frequency circuits is being researched.
2. Transistor-in-a-grain technology for ultimate CMOS: we have developed a self-aligned amorphous silicon crystallization technique using a germanium seed and are researching the use of this technique to place small geometry MOS transistors inside a grain of polycrystalline silicon.
3. Vacancy engineering for boron diffusion suppression: we are using vacancy-fluorine clusters to suppress boron diffusion in silicon and have applied this technique to silicon bipolar technology to achieve a world record cut-off frequency of 110GHz.
4. Behaviour of fluorine in silicon: our earlier research has shown that fluorine has a variety of interesting and useful properties in silicon. We are currently using fluorine to dramatically increase the crystallization distance during metal induced lateral crystallization of amorphous silicon for application in thin film transistors used in displays.
5. Silicon compatible carbon nanotube growth: we are researching a metal-free carbon nanotube growth method which is fully compatible with CMOS. The method uses germanium nanoparticles to seed the nanotube growth and yields single-wall, defect-free carbon nanotubes, with diameters typically less than 2nm.
6. Carbon nanotube FETs: our new carbon nanotube growth method is currently being applied to the fabrication of carbon nanotube field effect transistors.
7. Silicon nanowire transistors for biosensing applications.

1. Feasibility of novel deca-nanometer vertical MOSFETs for low-cost radio frequency application (EPSRC, 2007)
2. Metal-free carbon nanotube growth for nanoelectronics applications (EPSRC, 2006)
3. Platform grant on high frequency silicon-based nano devices (EPSRC, 2005)
4. Silicon fabrication for UK members of SINANO network of excellence (EPSRC, 2005)
5. Silicon based nano devices: SINANO (EU Framework 6, 2004)
6. Silicon fabrication facility (EPSRC, 2004)
7. SiGeC HBTs on insulator for RF communications (EPSRC, 2001)
8. SiGe MOS transistors for 50nm CMOS: SIGMOS (EU Framework 5, 2000)
9. 0.03um vertical shallow trench CMOS technology (EPSRC, 2000)