The University of Southampton
Telephone:
+442380593520
Email:
tjk@ecs.soton.ac.uk

Dr Tom J Kazmierski

Academic Staff

Tom J Kazmierski is an Associate Professor the Electronic Systems and Software Research Group at the Faculty of Physical Sciences and Engineering, University of Southampton, UK. He received the M.S. degree in Electronic Engineering from the Warsaw University of Technology, Warsaw, Poland, in 1973 and the Ph.D. degree from the Military University of Technology, Warsaw, in 1976.   He pursues research into numerical modelling, simulation, and synthesis techniques for computer-aided design of very large scale integration (VLSI) circuits and mixed-technology systems. From 1989 to 1990 he was a Lecturer in Microelectronics at the Griffith University in Brisbane, Australia. From 1990 to 1991 Tom worked as a Visiting Research Scientist at the IBM VLSI Technology Division, San Jose, CA, USA where he developed and patented synchronisation techniques for multi-solver simulation backplanes. He has contributed to the development of the VHDL-AMS standard by the IEEE, served as Chair of the IEEE DASC P1076.1 (VHDL-AMS) Working Group from 1999 to 2005. He has published over 160 papers, edited three books, and given a number of conference keynotes, invited talks and tutorials mostly in the area of analogue and mixed signal synthesis and hardware description languages. In recent years he has been working on simulation techniques, applications of VHDL-AMS and other hardware description languages to high-level system modelling and synthesis, including automated analogue and mixed-signal synthesis for ASIC design, synthesis of artificial VLSI neural networks, performance modelling of mixed-technology electromechanical systems and energy-harvester powered sensor nodes.

Research

Professional

Professional activities

Visiting Professor at the Technical University of Vienna.

Visiting Professor at the Warsaw University of Technology.

General Chair for Forum For Design Languages, FDL'10.

General Chair for Virtual Forum for Electronic Design Automation, VW-FEDA'11.

Member of the Technical Programme Committees for DATE and FDL.

Member of the IEEE Design Automation Standards Committee.

Publications

Bennett, Matthew, Mowlem, Matthew and Kazmierski, Tom (2007) A robust control algorithm for path tracking by an oceanographic unmanned aeronautical vehicle. At OCEANS 2007 - Europe OCEANS 2007 - Europe. 18 - 21 Jun 2007. 5 pp, pp. 1-5. (doi:10.1109/OCEANSE.2007.4302352).

D., Parsons and T., Kazmierski , S, Demeyer and J, Bosch (eds.) (1998) Run-time reusability in schematic capture: v. 1543.

J.A., Lopez-Alcantud and T., Kazmierski (2000) VHDL-AMS modeling of self-organized neural networks.

T., Kazmierski (1998) Formal description of VHDL-AMS analogue systems. At Proc. DATE'98 Proc. DATE'98. pp. 916-920.

T., Kazmierski (1998) Fuzzy-logic digital-analogue interfaces for accurate mixed-signal simulation.

T, Kazmierski and J, Baranowski (1999) A modified Jiles-Atherton model of ferromagnetic hysteresis for behavioral circuit simulation in VHDL-AMS.

D, Markland and T., Kazmierski (1999) Pre-synthesis circuit activity for VHDL.

Brown, A.D., Wong, S.C., Williams, A.C. and Kazmierski, T.J. (2000) Fast time domain simulation of generic resonant mode power converter: mapping the stability region.

Asensi, G.D., Kazmierski, T.J. and Merino, R.R. (2000) Architctural synthesis of high-level analogue VHDL-AMS descriptions using netlist extraction from parse trees. Electronics Letters, v 36, (20), 1680-1682.

Kazmierski, T J and Hamid, F A (2000) Analogue circuit synthesis from VHDL-AMS (invited paper). pp. 169-174.

Asensi, G D, Kazmierski, T J and Merino, R.R. (2000) Automated synthesis of analogue systems using a VHDL-AMS to HSPICE translator. At Proc DSIC'2000 Proc DSIC'2000.

Asensi, G D, Merino, R.R. and Kazmierski, T J (2000) Automated synthesis of high-level VHDL-AMS analog descriptions.

Kazmierski, T J and Kemp, T M (2000) System and method for synchronization of multiple analog servers on a simulation backplane.

Zwolinski, M, Yang, Z R and Kazmierski, T J (2000) Using robust adaptive mixing for statistical fault macromodelling. IEE Proc. Circuits Devices & Syst., 147 (Issue), 267-270.

Kazmierski, T J and Chalk, C (1998) A web-based VHDL-AMS design environment. At Proc. IEEE/VIUF BMAS?98 Proc. IEEE/VIUF BMAS?98.

Parsons, D (1997) Visual polymorphism in schematic capture for VHDL-AMS. At Proc. IEEE/VIUF BMAS?97 Proc. IEEE/VIUF BMAS?97.

Kazmierski, T J (1997) Semantic Analysis of Analogue and Differential Equations in VHDL-AMS (invited keynote paper). At Proc. TELSIKS'97 Proc. TELSIKS'97.

Zwolinski, M., Yang, Z.R. and Kazmierski, T.J. (2000) Applying Mutual Information Theory to Behavioural Analogue Fault Modelling. International Journal of Electronics, 87 (12), 1461-71.

Kazmierski, T. and Clayton, N. (2001) An electronic design framework. At Proc. FDL'01, Lyon, 3-7 Sept 2001 Proc. FDL'01, Lyon, 3-7 Sept 2001. pp. 227-31.

Hamid, F and Kazmierski, T. (2001) Analog filter synthesis from VHDL-AMS (Invited Paper). At Proc. FDL'01, Lyon, 3-7 Sept 2001 Proc. FDL'01, Lyon, 3-7 Sept 2001. 03 - 07 Sep 2001.

Kazmierski, T. and Clayton, N. (2002) A two-tier distributed electronic design framework. At Proc. DATE'02, Paris, March 2002 Proc. DATE'02, Paris, March 2002.

Kazmierski, T. (2002) Analogue integrated circuit synthesis from VHDL-AMS behavioural specifications. At Proc. 23rd Int Conf on Microelectronics, Proc. 23rd Int Conf on Microelectronics,.

Lopez, J. A., Asensi, G. D., Ruiz, R. and Kazmierski, T.J. (2002) Automated high level synthesis of hardware building blocks present in ART--based neural networks, from VHDL--AMS descriptions. At Proc. ISCAS'2002 Proc. ISCAS'2002.

Hamid, F.A. and Kazmierski, T.J. (2002) Synthesis and optimization of analog VLSI filters from VHDL-AMS parse trees. At Proc. ISCAS'2002 Proc. ISCAS'2002.

Kazmierski, T. J., Wang, X. and Mrcarica, Z. (1994) A lock-step synchronization algorithm for logic simulation in a multi-solver environment. At Proc. ASIC'94 Conf., Bejing Proc. ASIC'94 Conf., Bejing.

Zwolinski, M., Garagate, C. and Kazmierski, T. J. (1994) Mixed-signal simulation using the ALFA simulation backplane. At Proc. IEE Coll. on Mixed Mode Modelling and Simulation, London Proc. IEE Coll. on Mixed Mode Modelling and Simulation, London.

Zwolinski, M., Garagate, C., Mrcarica, Z., Kazmierski, T. J. and A.D, Brown (1995) Anatomy of a simulation backplane. IEE Proc.-Comput. Digit. Tech,, Vol. 1.

Zwolinski, M. and Kazmierski, T. J. (1994) Modelling in VHDL-A,. At Proc. IEE Coll. on Mixed Mode Modelling and Simulation, London Proc. IEE Coll. on Mixed Mode Modelling and Simulation, London.

Nichols, K G, Kazmierski, T J, Brown, A D and Zwolinski, M (1994) Overview of SPICE simulation algorithms. IEE Proc. Circuits, Devices and Systems, v. 141 (no. 4), 242-250.

Kazmierski, T.J. (1985) Single-iteration approach to backward differentiation formulas. IEE Proceedings G Circuits Devices and Systems, 132 (6), 249-254. (doi:10.1049/ip-g-1:19850051).

Brown, A. D., Zwolinski, M., Nichols, K. G. and Kazmierski, T J (1992) Confidence in Mixed-mode Circuit Simulation. Computer-Aided Design, v. 24 (2), 115-118.

Kazmierski, T J (1992) A spline-based MOSFET model with accurate surface potential profile. Facta Universitas, series Electronics and Energetics, University of Nis,, v.24 (1), 9-14.

Kazmierski, T J, Nichols, K G, Brown, A D and Zwolinski, M (1992) A general-purpose network solving system. Halaas, A. and P.B. Denyer, (eds.) In IFIP Transactions. North-Holland,. pp. 147-156.

Nichols, K.G., Kazmierski, T J, Zwolinski, M and Brown, A D (1993) Reliability of circuit-level simulation,. At Proc. IEE Colloquium on SPICE Proc. IEE Colloquium on SPICE.

Wilson, Peter R., Ross, J. Neil, Kazmierski, T.J. and Brown, Andrew D. (2001) VHDL-AMS Editor and debugger for Analogue and Mixed Signal Models (VEDAMS). At FDL FDL.

Kazmierski, Tom J and Aljunaid, Hessa J (2003) Synchronization of Analogue and Digital Solvers in Mixed-Signal Simulation on a SystemC Platform. At Forum on Specification and Design Languages Forum on Specification and Design Languages, Germany. 23 - 26 Sep 2003.

Kazmierski, T J and Yang, X Q (2003) A Secure Web-based framework for Electronic Design (Invited Paper). At Proc. ETRAN 2003, 9-13 June 2003, Herceg-Novi Proc. ETRAN 2003, 9-13 June 2003, Herceg-Novi. 09 - 13 Jun 2003.

Al-Junaid, Hessa and Kazmierski, Tom (2004) SEAMS - A systemC environment with analog and mixed-signal extensions. At ISCAS ISCAS, Canada. 23 - 26 May 2004. pp. 281-284.

Al-Junaid, Hessa and Kazmierski, Tom (2004) AN EXTENSION TO SYSTEMC TO ALLOW MODELLING OF ANALOGUE AND MIXED SIGNAL SYSTEMS AT DIFFERENT ABSTRACTION LEVELS. At SoC Design,Test and Technology Seminar SoC Design,Test and Technology Seminar, United Kingdom.

Al-Junaid, Hessa and Kazmierski, Tom (2005) An Analogue and Mixed-Signal Extension to SystemC. The Institution of Electrical Engineers Proceedings Circuits, Devices & Systems..

AL-Junaid, Hessa and Kazmierski, Tom (2006) HDL Models of Ferromagnetic Core Hysteresis Using Timeless Discretisation of the Magnetic Slope. At Design, Automation and Test in Europe Conference and Exhibition Design, Automation and Test in Europe Conference and Exhibition, Germany. 06 - 10 Mar 2006.

Burford, M and Kazmierski, T (2005) A VHDL-AMS Based Time Domain Skin Depth Model for Edge Coupled Lossy Transmission Stripline. At Forum on Specification and Design Languages 2005 Forum on Specification and Design Languages 2005, Switzerland. pp. 197-208.

Al-Junaid, Hessa, Kazmierski, Tom, Wilson, Peter and Baranowski, Jerzy (2006) Timeless Discretization of the Magnetization Slope in Modeling of Ferromagnetic Hysteresis. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Al-Junaid, Hessa and Kazmierski, Tom (2005) Analogue and mixed-signal extension to SystemC. IEE Proceedings on Circuits, Devices and Systems, 152 (6), 682-690.

Al-Junaid, Hessa, Kazmierski, Tom and Wang, Leran (2006) SystemC-A modeling of an automotive seating vibration isolation system. At Forum on Specification and Design Languages (FDL 2006) Forum on Specification and Design Languages (FDL 2006), Germany. 19 - 22 Sep 2006.

Wang, Leran and Kazmierski, Tom (2005) VHDL-AMS based genetic optimization of a fuzzy logic controller for automotive active suspension systems. At IEEE international conference on Behavioral Modeling and Simulation (BMAS 2005) IEEE international conference on Behavioral Modeling and Simulation (BMAS 2005). 22 - 23 Sep 2005. pp. 124-127.

Wang, Leran and Kazmierski, Tom (2005) VHDL-AMS modeling of an automotive vibration isolation seating system. At IASTED international conference on Circuits, Signals and Systems (CSS 2005) IASTED international conference on Circuits, Signals and Systems (CSS 2005), United States. 24 - 26 Oct 2005.

Wang, Leran and Kazmierski, Tom (2007) VHDL-AMS based genetic optimisation of fuzzy logic controllers. COMPEL: The International Journal for Computation and Mathematics in Electrical and Electronic Engineering, 26 (2), 452-465.

Wang, Leran and Kazmierski, Tom (2005) VHDL-AMS - based Hybrid Approach to ARGESIM Comparison ‘C13 Crane and Embedded Control’ with SystemVision. Simulation News Europe, 43, pp. 30.

Ren, Xianqiang and Kazmierski, Tom (2005) Linearly graded behavioural analogue performance models using support vector machines and VHDL-AMS. At Forum on specification and design languages Forum on specification and design languages, Switzerland.

Ren, Xianqiang and Kazmierski, Tom (2006) Behavioral-level performance modeling of analog and mixed-signal systems using support vector machines. At Behavioral modeling and simulation conference Behavioral modeling and simulation conference, United States. pp. 28-33.

Ren, Xianqiang and Kazmierski, Tom (2007) Performance modelling and optimisation of RF circuits using support vector machines. At IEEE International Mixed design conference (MIXDES) IEEE International Mixed design conference (MIXDES), Poland. pp. 317-321.

Zhao, Chenxu, Wang, Leran and Kazmierski, Tom (2007) An efficient and accurate MEMS accelerometer model with sense finger dynamics for applications in mixed-technology control loops. At IEEE Behavioral Modeling and Simulation Conference (BMAS 2007) IEEE Behavioral Modeling and Simulation Conference (BMAS 2007), United States. 20 - 21 Sep 2007. pp. 143-147.

Wang, Leran, Kazmierski, Tom, Al-Hashimi, Bashir, Beeby, Steve and Torah, Russel (2007) An Integrated Approach to Energy Harvester Modeling and Performance Optimization. At IEEE Behavioral Modeling and Simulation Conference (BMAS 2007) IEEE Behavioral Modeling and Simulation Conference (BMAS 2007), United States. 20 - 21 Sep 2007. pp. 121-125.

Wang, Leran, Kazmierski, Tom, Al-Hashimi, Bashir, Beeby, Steve and Torah, Russel (2008) Integrated approach to energy harvester mixed technology modelling and performance optimisation. At Design, Automation and Test in Europe (DATE 2008) Design, Automation and Test in Europe (DATE 2008), Germany. 10 - 14 Mar 2008.

Kazmierski, Tom, Zhou, Dafeng and Al-Hashimi, Bashir (2008) Efficient circuit-level modelling of ballistic CNT using piecewise non-linear approximation of mobile charge density. At DATE08 DATE08. pp. 146-151.

Wang, Leran, Zhao, Chenxu and Kazmierski, Tom (2008) An extension to VHDL-AMS for AMS systems with partial differential equations. In, Villar, Eugenio (ed.) Embedded Systems Specification and Design Languages (Selected Contributions from FDL’07). Springer, pp. 123-136. ,

Wang, Leran, Kazmierski, Tom, Al-Hashimi, Bashir, Beeby, Steve and Zhu, Dibin (2009) An automated design flow for vibration-based energy harvester systems. At Design, Test and Automation in Europe (DATE 2009) Design, Test and Automation in Europe (DATE 2009), France. 20 - 24 Apr 2009. pp. 1391-1396. (In Press)

Kazmierski, Tom, Zhou, Dafeng and Al-Hashimi, Bashir (2007) A Fast, Numerical Circuit-Level Model of Carbon Nanotube Transistor. At Nanoscale Architectures, 2007. NANOSARCH 2007. IEEE International Symposium on Nanoscale Architectures, 2007. NANOSARCH 2007. IEEE International Symposium on. 21 - 22 Oct 2007. pp. 33-37.

Zhou, Dafeng, Kazmierski, Tom and Al-Hashimi, Bashir (2008) VHDL-AMS implementation of a numerical ballistic CNT model for logic circuit simulation. At Specification, Verification and Design Languages, 2008. FDL 2008. Forum on Specification, Verification and Design Languages, 2008. FDL 2008. Forum on. 23 - 25 Sep 2008. pp. 94-98.

Zhou, Dafeng, Kazmierski, Tom and Al-Hashimi, Bashir (2009) VHDL–AMS implementation of a numerical ballistic CNT model. In, Radetski, Martin (ed.) Languages for Embedded Systems and their Applications. Heidelberg, DE. Springer, pp. 87-100. (Lecture Notes in Electrical Engineering, 36) ,

Kazmierski, Tom, Zhou, Dafeng, Al-Hashimi, Bashir and Ashburn, Peter (2010) Numerically efficient modeling of CNT transistors with ballistic and non-ballistic effects for circuit simulation. IEEE Transactions on Nanotechnology, 9 (1), 99-107. (doi:10.1109/TNANO.2009.2017019).

Kazmierski, Tom, Zhou, Dafeng and Al-Hashimi, Bashir (2009) HSPICE implementation of a numerically efficient model of CNT transistor. At Forum on Specification and Design Languages (FDL 2009) Forum on Specification and Design Languages (FDL 2009), Germany. 22 - 24 Sep 2009.

Burford, MR, Levin, PA and Kazmierski, TJ (2008) Temporal skew and mode conversion management in differential pairs to 15 GHz. Electronics Letters, 44, 35-36.

Kazmierski, T.J. (2008) Automated performance optimisation and layout synthesis of MEMS accelerometer with sigma-delta force-feedback control loop. In 2008 IEEE International Behavioral Modeling and Simulation Workshop. IEEE. pp. 19-24. (doi:10.1109/BMAS.2008.4751233).

Tisdale, N., Kazmierski, T. and Brooks, D. (2008) Channel mismatch compensation for space-time adaptive processors. MILCOM 2008 - 2008 IEEE Military Communications Conference, 7 pp.-.

Kazmierski, T.J. (2009) Analysis of sense finger dynamics for accurate ΣΔ MEMS accelerometer modelling in VHDL-AMS. In 2009 Forum on Specification & Design Languages (FDL). IEEE. 4 pp.-.

Wang, LR and Kazmierski, TJ (2009) VHDL-AMS Based Genetic Optimization of Mixed-Physical-Domain Systems in Automotive Applications. SIMULATION-TRANSACTIONS OF THE SOCIETY FOR MODELING AND SIMULATION INTERNATIONAL, 85, 661-670.

Tisdale, N, Kazmierski, TJ and Brooks, D (2010) Bandwidth selective filter for the pre-excision of narrowband interference in broadband beamformers. IET Communications, 4, 201-212.

Kazmierski, Tom, Zhou, Dafeng, Al-Hashimi, Bashir and Ashburn, Peter (2010) Numerically efficient modelling of CNT transistors with ballistic and non ballistic effects for circuit simulation. IEEE Transactions on Nanotechnology, 9 (1), 99-107.

Wang, Leran and Kazmierski, Tom (2009) VHDL-AMS based genetic optimisation of mixed-physical-domain systems in automotive applications. Simulation: Transactions of the Society for Modeling and Simulation International, 85 (10), 661-670.

Zhao, Chenxu and Kazmierski, Tom (2009) Analysis of sense finger dynamics for accurate ?? MEMS accelerometer modelling in VHDL-AMS. At 2009 Forum on Specification & Design Languages (FDL 2009) 2009 Forum on Specification & Design Languages (FDL 2009).

Zhao, Chenxu and Kazmierski, Tom (2010) Genetic-based automated synthesis and optimization of MEMS accelerometers with Sigma-Delta control. At ISCAS 2010 ISCAS 2010.

Zhao, Chenxu and Kazmierski, Tom (2010) An automated design flow for MEMS accelerometers with Sigma-Delta control. At ICIA 2010 ICIA 2010.

Zhao, Chenxu and Kazmierski, Tom (2010) A Holistic Approach to Automated Synthesis of Mixed-technology Digital MEMS Sensors Part 1: Layout Synthesis of MEMS Component with Distributed Mechanical Dynamics. Sensors & Transducers, 117, 1-15.

Zhao, Chenxu and Kazmierski, Tom (2010) A Holistic Approach to Automated Synthesis of Mixed-technology Digital MEMS Sensors Part 2: Synthesis of a MEMS System with Associated Control Loop. Sensors & Transducers, 117, 16-28.

Zhao, Chenxu and Kazmierski, Tom (2010) SystemC-A Modelling of Systems with Distributed Behaviour. At FDL 2010 FDL 2010.

Zhao, Chenxu and Kazmierski, Tom (2010) Genetic-Based High-Level Synthesis of Sigma-Delta Modulator in SystemC-A. At FDL 2010 FDL 2010.

Wang, Leran, Kazmierski, Tom, Al-Hashimi, Bashir, Weddell, Alex, Merrett, Geoff and Ayala Garcia, Ivo (2011) Accelerated simulation of tunable vibration energy harvesting systems using a linearised state-space technique. At Design, Test and Automation in Europe (DATE 2011) Design, Test and Automation in Europe (DATE 2011), France. 14 - 18 Mar 2011.

Weddell, Alex, Merrett, Geoff V., Kazmierski, Tom and Al-Hashimi, Bashir (2011) Accurate supercapacitor modeling for energy-harvesting wireless sensor nodes. IEEE Transactions on Circuits and Systems. Part 2: Express Briefs, 58 (12), 911-915. (doi:10.1109/TCSII.2011.2172712).

Kazmierski, Tom, Wang, Leran, Al-Hashimi, Bashir and Merrett, Geoff V. (2012) An explicit linearized state-space technique for accelerated simulation of electromagnetic vibration energy harvesters. IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems, 31 (4), 522-531. (doi:10.1109/TCAD.2011.2176124).

Kazmierski, Tom, Merrett, Geoff V., Wang, Leran, Al-Hashimi, Bashir, Weddell, Alex and Ayala Garcia, Ivo (2012) Modeling of Wireless Sensor Nodes Powered by Tunable Energy Harvesters: HDL-Based Approach. IEEE Sensors Journal, 12 (8), 2680-2689. (doi:10.1109/JSEN.2012.2196037).

Wang, Leran, Kazmierski, Tom, Al-Hashimi, Bashir, Aloufi, Mansour and Wenninger, Joseph (2012) Response-surface-based design space exploration and optimisation of wireless sensor nodes with tunable energy harvesters. At DATE2012: Design, Test and Automation in Europe DATE2012: Design, Test and Automation in Europe, Germany. 12 - 16 Mar 2012.

Umoh, Ime, Kazmierski, Tomasz and Al-Hashimi, Bashir (2013) A dual-gate graphene FET model for circuit simulation - SPICE implementation. IEEE Transactions on Nanotechnology, 12 (3), 427-435. (doi:10.1109/TNANO.2013.2253490).

Kazmierski, Tom, Wang, Leran, Merrett, Geoff V., Al-Hashimi, Bashir and Aloufi, Mansour (2013) Fast design space exploration of vibration-based energy harvesting wireless sensors. IEEE Sensors Journal, 13 (11), 4393-4401. (doi:10.1109/JSEN.2013.2263792).

Kazmierski, Tom J., Wang, Leran, Al-Hashimi, Bashir and Merrett, Geoff V. (2013) DoE-based performance optimization of energy management in sensor nodes powered by tunable energy-harvesters. At Design, Automation and Test in Europe (DATE 13) Design, Automation and Test in Europe (DATE 13), France. 18 - 22 Mar 2013. p. 484.

Umoh, Ime J. and Kazmierski, Tom J. (2011) VHDL-AMS model of a dual-gate graphene FET. At Forum on Specification Design Languages 2011 Forum on Specification Design Languages 2011, Germany. 13 - 15 Sep 2011. pp. 1-5.

Umoh, Ime J. and Kazmierski, T.J. (2013) A floating gate graphene FET complementary inverter with symmetrical transfer characteristics. At 2013 IEEE International Symposium on Circuits and Systems (ISCAS) 2013 IEEE International Symposium on Circuits and Systems (ISCAS), China. pp. 2071-2074.

Umoh, Ime J. and Kazmierski, T. J. (2013) Graphene devices with bandgap - modelling and identification. At Proceedings of 57th ETRAN Conference Proceedings of 57th ETRAN Conference. 03 - 06 Jun 2013. pp. 1-5.

Umoh, Ime J. and Kazmierski, Tom J. (2011) HSPICE implementation of a device model for a dual gate graphene field effect transistor. At ETRAN 2011 ETRAN 2011. 06 - 09 Jun 2011. pp. 1-4.

Umoh, Ime J. and Kazmierski, Tom J. (2011) Ambipolar graphene FET: modelling in VHDL-AMS. At Virtual Worldwide Forum for PhD Researchers in Electronic Design Automation Virtual Worldwide Forum for PhD Researchers in Electronic Design Automation. pp. 1-4.

Zhao, Chenxu and Kazmierski, T J (2010) Genetic-Based High-Level Synthesis of ΣΔ Modulator in System C-A. FDL2010: Forum For Design Languages, United Kingdom. 14 - 16 Sep 2010. 5 pp, pp. 1-5. (doi:10.1049/ic.2010.0147).

Leech, Charles and Kazmierski, T J (2014) Energy Efficient Multi-Core Processing. ELECTRONICS,, 18 (1), 3-10. (doi:10.7251/ELS1418003L).

Kazmierski, T J and Leech, Charles (2014) Synthesis of application specific processor architectures for ultra-low energy consumption. Small Systems Simulation Symposium, Serbia.

Umoh, Ime Jarlath, Kazmierski, Tom and Al-Hashimi, Bashir (2014) Multi-layer graphene FET compact circuit-level model with temperature effects. IEEE Transactions on Nanotechnology, 13 (4), 805-813. (doi:10.1109/TNANO.2014.2323129).

Gutierrez Alcala, Mauricio Daniel, Tenentes, Vasileios and Kazmierski, Tomasz (2016) Susceptible workload driven selective fault tolerance using a probabilistic fault model. IOLTS'16, Spain. 04 - 06 Jul 2016. 6 pp. (In Press)

Kueh, Si Mon and Kazmierski, Tom J. (2016) Massively-parallel bit-serial neural networks for fast epilepsy diagnosis: a feasibility study. World Academy of Science, Engineering and Technology, 10 (1), 233 - 237.

Snook, Colin and Kazmierski, Tomasz (2016) Using Event-B and Modelica to evaluate thermal management strategies in many core systems. In, 2016 Forum on Specification and Design Languages (FDL). Forum on specification & Design Languages (FDL 2016) (16/09/16) IEEE. , (doi:10.1109/FDL.2016.7880380).

Umoh, Ime, Moktadir, Zakaria and Kazmierski, Tomasz et al. (2016) A circuit model for defective bilayer graphene transistors. Solid-State Electronics, 119, supplement p 33-38, 33-38. (doi:10.1016/j.sse.2016.02.003).

Domenech Asensi, Gines and Kazmierski, Tomasz (2017) Generation of new power processing structures exploiting genetic programming. 2017 IEEE 26th International Symposium on Industrial Electronics, Edinburgh, United Kingdom. 19 - 21 Jun 2017. 4 pp. (doi:10.1109/ISIE.2017.8001336).

Gutierrez Alcala, Mauricio, D., Tenentes, Vasileios, Kazmierski, Tomasz J. and Rossi, Daniele (2017) Low power probabilistic online monitoring of systematic erroneous behaviour. In 2017 22d IEEE Test Symposium (ETS). IEEE. 2 pp.

Gutierrez Alcala, Mauricio, Daniel, Tenentes, Vasileios, Rossi, Daniele and Kazmierski, Tomasz (2017) Susceptible workload evaluation and protection using selective fault tolerance. Journal of Electronic Testing.

Cai, Yunpeng, Savanth, Parameshwarappa Anand, Kumar, Prabhat, Pranay, Myers, James, Weddell, Alexander and Kazmierski, Tomasz (2017) Evaluation and analysis of single-phase clock flip-flops for NTV applications. In 2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS). IEEE. 6 pp. (doi:10.1109/PATMOS.2017.8106962).

Gutierrez Alcala, Mauricio, Daniel, Tenentes, Vasileios, Kazmierski, Tomasz and Rossi, Daniele (2017) Low cost error monitoring for improved maintainability of IoT applications. At IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems. 23 - 25 Oct 2017. 6 pp.

Lu, Yue and Kazmierski, Tomasz (2017) Variable-accuracy bit-serial multiplication with row bypassing for ultra low power. The IEEE Nordic Circuits and Systems Conference: NORCHIP and International Symposium of System-on-Chip (SoC), Linkoping, Sweden. 24 - 25 Oct 2017.

Kueh, Si Mon and Kazmierski, Tomasz (2017) A dedicated bit-serial hardware neuron for massively-parallel neural networks in fast epilepsy diagnosis. IEEE-NIH 2017 Special Topics Conference on Healthcare Innovations and Point-of-Care Technologies, Bethesda, United States. 06 - 08 Nov 2017. 4 pp, pp. 105-108. (doi:10.1109/HIC.2017.8227595).

Brown, Andrew, Thomas, David, Reeve, Jeffrey, Tarawneh, Ghaith, De Gennaro, Alessandro, Mokhov, andrey, Naylor, Matthew and Kazmierski, Tomasz (2017) Distributed event-based computing. In Proceedings of ParCo 2017. 10 pp. (In Press)

Brown, Andrew, Thomas, David, Reeve, Jeff, Tarawneh, Ghaith, De Gennaro, Alessandro, Mokhov, Andrey, Naylor, Matthew and Kazmierski, Tom (2018) Distributed event-based computing. In, Parallel Computing is Everywhere. IOS Press BV, pp. 583-592. (Advances in Parallel Computing, , (doi:10.3233/978-1-61499-843-3-583), 32) , (doi:10.3233/978-1-61499-843-3-583).

Lu, Yue and Kazmierski, Tom J. (2018) Error-free near-threshold adiabatic CMOS logic in the presence of process variation. Fummi, Franco and Wille, Robert (eds.) In Languages, Design Methods, and Tools for Electronic System Design - Selected Contributions from FDL 2016: Selected Contributions from FDL 2016. vol. 454, Springer Verlag. 12 pp, pp. 103-114. (doi:10.1007/978-3-319-62920-9_6).

Kueh, Si Mon and Kazmierski, Tom J. (2018) Low-power and low-cost dedicated bit-serial hardware neural network for epileptic seizure prediction system. IEEE Journal of Translational Engineering in Health and Medicine, 1-9. (doi:10.1109/JTEHM.2018.2867864).

Cai, Yunpeng, Savanth, Parameshwarappa Anand, Kumar, Prabhat, Pranay, Myers, James, Weddell, Alexander and Kazmierski, Tomasz (2018) Ultra-Low Power 18-Transistor Fully-Static Contention-Free Single-Phase Clocked Flip-Flop in 65nm CMOS. IEEE Journal of Solid State Circuits. (doi:10.1109/JSSC.2018.2875089). (In Press)

Cai, Yunpeng, Savanth, Parameshwarappa Anand, Kumar, Prabhat, Pranay, Myers, James, Weddell, Alexander and Kazmierski, Tomasz (2018) Dataset for 'Ultra-Low Power 18-Transistor Fully-Static Contention-Free Single-Phase Clocked Flip-Flop in 65nm CMOS'. University of Southampton doi:10.5258/SOTON/D0678 [Dataset]

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