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Lu, Yue and Kazmierski, Tomasz (2017) Variable-accuracy bit-serial multiplication with row bypassing for ultra low power. The IEEE Nordic Circuits and Systems Conference: NORCHIP and International Symposium of System-on-Chip (SoC), Linkoping, Sweden. 24 - 25 Oct 2017.

Lu, Yue and Kazmierski, Tom J. (2018) Error-free near-threshold adiabatic CMOS logic in the presence of process variation. Fummi, Franco and Wille, Robert (eds.) In Languages, Design Methods, and Tools for Electronic System Design - Selected Contributions from FDL 2016: Selected Contributions from FDL 2016. vol. 454, Springer Verlag. pp. 103-114 . (doi:10.1007/978-3-319-62920-9_6).

Lu, Yue, Duan, Shengyu and Kazmierski, Tom J. (2018) A new ageing-aware approach via path isolation. In FDL 2018 - Proceedings of the 2018 Forum on Specification and Design Languages. vol. 2018-September, IEEE Computer Society.. (doi:10.1109/FDL.2018.8524033).

Lu, Yue, Duan, Shengyu, Halak, Basel and Kazmierski, Tom (2019) A variation-aware design methodology for distributed arithmetic. Electronics, 8 (1), 1-12. (doi:10.3390/electronics8010108).

Lu, Yue, Kazmierski, Tom J. and Liu, Lianxi (2019) A bit-serial variable-accuracy FFT processor for energy-harvesting systems. In 2018 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS). IEEE. pp. 299-304 . (doi:10.1109/APCCAS.2018.8605629).

Lu, Yue, Duan, Shengyu, Halak, Basel and Kazmierski, Tom J. (2019) A cost-efficient error-resilient approach to distributed arithmetic for signal processing. Microelectronics Reliability, 93, 16-21. (doi:10.1016/j.microrel.2018.12.007).


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