This project is concerned with experimental and simulation studies into the degradation processes that occur when voids in solid dielectric materials experience high applied electric fields. A method has been developed for manufacturing 2mm thick samples of silicone resin that contain a single void of around 1mm diameter. Five samples are simultaneously electrically stressed under an applied ac sinusoidal voltage of 12kV for 6 hours and the voltage is then increased to 15kV until a sample fails. During the stressing period, PD data is regularly acquired. The remaining 4 samples are then inspected for signs of degradation. Degraded samples that have not suffered catastrophic failure and contain pits or evidence of electrical trees are sectioned using an ultra-microtome equipped with a CR-21 cryo-system set at -110ãC in order to provide a surface containing open segments of pits or trees. The experiment is repeatable and the obtained degraded samples and the degradation areas of microtomed samples have been analysed using Raman spectroscopy to identify the chemical content of the degraded areas at the void /silicone rubber interface. In addition, models have been developed to simulate the observed PD behavior. These models will be adapted to include the degradation processes observed in the experiments.