The University of Southampton
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Electronics and Computer Science➞Undergraduate

ELEC6237 System on Chip Electronic Design Automation

Module Overview

The aim of this course is to give a broad grounding in the principles and practice of  System on Chip Design, with ephesis on secure hardware development

The first part of the  module is intended to provide students with the experience of applying industry standard software tools to complete  IC design from  from conceptual design through to IC layout using and Cadence tools

The second part of the course  is intended to cover the security and trust from hardware prespectives, we willl study the vunrebilities  of modern systems on chip design flow and how these can become legitimate secuirity threats such as hardware trojans and physical attacks

Aims & Objectives

Aims

Knowledge and Understanding

Having successfully completed this module, you will be able to demonstrate knowledge and understanding of:

  • Describe the system on chip design flow
  • Use industry standards Synosys and Cadence tools to implment a design from concept to silicon
  • Describe the main security threats from Hardware design prespectives
  • Review the states of the arts hardware secuirity method and devices

Syllabus

  1. System On Chip Design Flow
  2. Circuit Design Techniquies
  3. Layout
  4. Digital Simulation
  5. RTL Synthesis
  6. Automatic Place and Route
  7. Fabrication
  8. SoC Secuirity threat s
  9. Hardware trojans
  10. IP protections methods
  11. Physical Unclonable Functions

Learning & Teaching

Learning & teaching methods

I am proposing to update 25% of the course contents in includes new teaching materilas on the topics of hardware secuirity of systems on chips

ActivityDescriptionHours
Lecture1-double lecture per week 24
Computer Labweekly labs to apply the principles in practice24

Assessment

Assessment methods

Laboratory sessions are scheduled in the labs on level 2 of the Zepler building

Length of each session: 3 hours
Number of sessions completed by each student: 9
Max number of students per session: unlimited
Demonstrator:student ratio: 1:8
Preferred teaching weeks: 2 to 11

MethodHoursPercentage contribution
IC design using Synopsys and cadence tools-65%
Hardware security assignment-25%
Lab -10%

Referral Method: By set coursework assignment(s)

The referral assessment willl consist of a new coursework on IC design using Synopsys and cadence tools.

The original marks of the remaining  assessments will be carried  foreward

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