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Simulating the next generation of computers

Published: 10 October 2008

New modelling tools which can simulate the next generation of computers will be described in Professor Mark Zwolinski's inaugural lecture on 15 October.

Professor Mark Zwolinski from the ECS Electronic Systems and Devices Group will deliver his inaugural lecture entitled 'Virtual Computing: Simulation by and of Computers' on Wednesday 15 October, during which he will claim that sophisticated modelling tools are needed if smaller, multi-processor systems are to work in years to come.

'We are reaching the physical limits of transistor sizes and we are getting to a point where it is becoming too expensive to manufacture them,' he said. 'Therefore, we can no longer cobble together massive systems with lots of processors in the hopes that they will work. We have to simulate them first.'

Professor Zwolinski will go on to describe that as chips are being developed which accommodate semiconductor structures below 32 nanometres, it becomes increasingly difficult to produce circuits which are reproducible, behave in the same way and are fault tolerant.

'If we build systems that have lots of processors, they will have faults, so we must build systems that are fault tolerant,’ he said.

At the moment, Professor Zwolinski and his team are developing hardware and software so that they can construct virtual prototypes of fault tolerant systems so that they can assess the feasibility of big computer systems before building them.

The lecture takes place in Nightingale Lecture Theatre, bdg 67 at 4 pm on Wednesday 15 October. Refreshments are available from 3.30 pm.

The lecture will be chaired by Emeritus Professor Henri Kemhadjian.

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