Date:

2007-

Themes:

Healthcare, Healthcare in ECS, Wireless Sensing and Sensor Networks

The group intends to develop a Long-term Patient Monitoring Research Platform to support and assist health-care providers. The Research platform, which does not intend to rely on a central server or a continuously connected Internet connection, aims to act as a low-cost support tool to aid health-care providers of the future.

Primary investigator

• ddj07r

Secondary investigators

• jsr
• Nick Harris

Associated research groups

• Electronic Systems and Devices Group
• Electronics and Electrical Engineering

Date:

2003-2007

Theme:

Nanoelectronics

The continued scaling of MOSFETs to the deca-nanometre regime has reached the point where the transistor size is now comparable with the grain size in a polysilicon film (typically 100-200nm). The time is therefore right to research processing techniques that would allow a transistor to be fabricated inside a grain of polysilicon. Such transistors would be expected to have significantly better performance than thin film transistors (TFTs) because grain boundaries would be eliminated from the channel region. The transistor performance might also approach that achievable in single-crystal silicon if good control could be obtained over the quality of the silicon inside the polysilicon grain. The applications for transistor-in-a-grain technology would potentially be enormous, and would include high-performance large area electronics, displays and any technology where low temperature processing was required. In the longer term, this technology may also be attractive for post-scaling CMOS, since it would enable 3D CMOS technologies to be implemented.

Layers of polycrystalline silicon self-assemble during growth and hence the positions of the grains and grain boundaries are random. The key issue in researching transistor-in-a-grain technology is therefore to devise processing techniques that allow the polysilicon grains to be precisely located with respect to the position of the transistor. This thesis investigates grain localization techniques and transistor architectures for transistor-in-grain technology. Two novel methods of low temperature crystallization of amorphous silicon are researched to increase the grain size and controlling the grain boundary locations. One method uses fluorine during metal induced lateral crystallization (MILC) of α-Si, which suppresses random grain nucleation during crystallization anneal and increases the laterally crystallized distance. Fluorine implantation also significantly reduces the density of the nickel-silicide precipitates and improves the grain texture in the laterally crystallized silicon. Another method employs germanium seed where a new amorphous silicon crystallization phenomenon has been identified to originate from the perimeter of the germanium seed during low temperature anneal and grain localization is achieved without any metal contamination. These methods of devising high quality poly-silicon layer have considerable commercial potential for a number of devices like thin film transistors for large area electronics, transistor-in-grain for 3D CMOS, thin film solar cells, sensor applications in a cost effective thin film based nanowire technology and any devices where low temperature processing is required.

Primary investigator

• Peter Ashburn

Secondary investigator

• mmah

Associated research groups

• Nano Research Group
• Southampton Nanofabrication Centre

Date:

2007-2010

Theme:

Nanoelectronics

Funding:

EPSRC

This research aims to investigate the use of CMOS-compatible vertical MOSFETs for the implementation of medium-power RF circuits, opening the way to higher integration of RF systems. Vertical transistors are currently of interest because they offer an alternative route to ultra-short channel MOS transistors with relaxed lithography requirements (and hence considerably lower costs), decouple gate length from the packing density and provide improved current drive per unit silicon area compared with conventional lateral CMOS. In this research approaches will be investigated that deliver these benefits through the integration of vertical MOSFETs in a mature CMOS technology with minimum additional masks above those required for standard 0.5 micron CMOS. The intention is to appraise in depth, the feasibility of this novel technology for the manufacture of low-cost RF solutions.

The challenges of vertical MOSFETs for RF applications are high overlap capacitance, short channel effects, susceptibility to dry etch damage and the lack of an appropriate silicidation technology. A detail investigation has been done to deliver solutions for challenges like overlap capacitance, short channel effects and dry etch damage. CMOS compatible Fillet Local Oxidation (FILOX) process, novel structures (frame gate) and optimised process have been researched to reduce the overlap capacitance and to eliminate dry etch damage associated device degradation. The resulting transistors are found to have significantly improved immunity to short channel effects, with near ideal sub-threshold slopes of 70 to 80 mV/decade, and DIBL of 30 to 35 mV/V. Most recently we have developed for the first time a silicidation technology for surround gate vertical MOSFETs. The technology uses a double spacer comprising a polysilicon spacer for the surround gate and a nitride spacer for the silicidation. For a 120 nm channel length, silicided frame gate vertical nMOSFETs show a 30% improvement in the drive current with an excellent sub-threshold slope of 78mV/decade and a DIBL of 30 mV/V. For an 80 nm channel length, a 43% improvement in the drive current is obtained. Vertical transistors with our FILOX process and silicidation resulted in a transistor with low overlap capacitance and high transistor transconductance. While conventional planar nMOS devices exhibit a fT of 10 GHZ in a 0.5 micron technology node, our vertical nMOS devices fabricated by above mentioned FILOX and silicidation process demonstrating a fT of 20 GHZ in the same technology node. We are currently investigating several RF circuits with verical nMOS devices aimed at the highly lucrative 1-10 GHz market.

Primary investigators

• Peter Ashburn
• Steve Hall
• Bill Redman-White
• Octavian Buiu

Secondary investigator

• mmah

Partner

• University of Liverpool

Associated research groups

• Nano Research Group
• Southampton Nanofabrication Centre

Date:

2007-

Theme:

Algorithms for Wireless Sensor Networks

One of the directions that Wireless Sensor Networks are considered to play an important role, is in motion detection and target tracking systems. This research focuses on employing l ow-cost,low-power, limited sized devices, for detection and tracking of mobile targets. Novel tracking algorithms and information processing techniques are investigated to improve performance. This project aims at developing a system capable of handling multiple targets moving arbitrarily in the networks coverage area.

Primary investigator

• ebm07r

Secondary investigators

• jsr
• Neil White

Associated research groups

• Electronic Systems and Devices Group
• Electronics and Electrical Engineering

Date:

2005-

Themes:

Energy Harvesting & Sensing Devices, Low-Energy Sustainable Systems, Low-Energy Sustainable Systems

To develop and demonstrate an integrated approach to power management such that sensors within a sensor network are able to manage their energy requirements, and harvest energy from the local environment, whilst simultaneously coordinating their activities in order to achieve system-wide aggregate goals.

Primary investigators

• asw05r
• Neil Jonathan Grabham
• Nick Harris
• Neil White

Associated research groups

• Electronic Systems and Devices Group
• Electronics and Electrical Engineering

Date:

2005-

Theme:

Architectures and Interfaces

This research has proposed a hardware/software architecture that provides equal weighting to all node functions; for example, communications, energy management, intelligent sensing, locationing and actuation. This promotes modular design, code reuse, and protocol standardisation in the development of all node functions.

Primary investigators

• Geoff Merrett
• asw05r

Secondary investigators

• ddj07r
• ebm07r

Associated research groups

• Electronic Systems and Devices Group
• Electronics and Electrical Engineering

Date:

2004-

Theme:

Simulation, Modelling and Evalution

Funding:

EPSRC

Project Aims
Simulation is heavily used in WSN research, but results are only as realistic as the models that they are built around. To ensure a close correlation between simulation and practical results, this research has developed communication, sensing, energy and timing models. WSNsim (a simulator for WSNs) has been developed as a model-centric simulator built around a structured ‘unified’ stack for communications, energy management and intelligent sensing.

WSNsim: A Simulator for WSNs
WSNsim (Wireless Sensor Network Simulator) was developed to debug, evaluate and improve algorithms developed at the University. WSNsim is an in-house object orientated discrete-event simulator for WSNs, developed using Microsoft Visual Studio .net 2005 (due to limited support and documentation, it is not currently available as open-source).

          
Left: The Structure of WSNsim, Right: A Network Under Simulation in WSNsim

As shown above, WSNsim gives considerable emphasis to the range of environmental and physical models that it encompasses. Furthermore, the use of a ‘unified’ stack for communications, energy management and intelligent sensing further increase the attention that WSNsim gives to these areas, while also allowing the simulation of code designed using a structured layered process.

Environmental and Physical Modelling
To support WSNsim, a range of environmental and physical models were investigated, encompassing communication, energy, sensing and timing.

Modelling Wireless Communication and Propagation

The communication model considers both path loss (using an empirical path loss model) and packet reception (by considering BERs at a per-byte level). Energy models are proposed for energy stores (batteries and supercapacitors), energy sources (photovoltaics and vibration energy harvesters), and energy consumers (radio transceivers, microcontrollers, and peripherals).

Modelling Energy Stores (Top Left), Energy Sources (Top Right) and Sensors (Bottom)

Sensor models account for errors and inaccuracies in sensed data by modelling the sensor hardware. Timing models consider the differences between the ‘true’ time, and the nodes’ perceptions of time.

Primary investigator

• Geoff Merrett

Secondary investigators

• Bashir Al-Hashimi
• Nick Harris
• Neil White
• Alex Weddell

Associated research groups

• Electronic Systems and Devices Group
• Electronics and Electrical Engineering

Date:

2004-

Theme:

Algorithms for Wireless Sensor Networks

The development of wireless sensor networks presents extensive research challenges in retaining a "reasonable" network lifetime under constraints imposed by the limited energy reserves inherent in small, locally powered embedded nodes. This research addresses these challenges through the development and validation of IDEALS/RMR - an application independent, localised system to control and manage the degradation of a network through the novel combination of information management (assessed through RMR) and energy management (controlled by IDEALS) - a union which increases the network lifetime at the expense of discarding often trivial data. To evaluate these algorithms, a simulator (WSNsim), was developed to enable high level network and performance analysis. Results show that IDEALS/RMR can provide controlled network degradation under load conditions.

Primary investigator

• Geoff Merrett

Secondary investigators

• Bashir Al-Hashimi
• Nick Harris
• Neil White

Associated research groups

• Electronic Systems and Devices Group
• Electronics and Electrical Engineering

Themes:

Modelling and Simulation, High Voltage Engineering, Space and surface charge

Dielectric breakdown phenomena pose major scientific and technological problems. The degradation of polymer insulation under high electric stress is associated with space charge formation. In fact, space charge accumulation in dc regime is the main reason that prevents the use of polymers as insulation for high voltage direct current cables. Whilst the Laplacian field, may be adequate representation of that which is experienced by an insulator over a short time, it is well appreciated that, over longer time scales, this becomes modified through the injection of charge carriers from the electrodes or the dissociation of neutral species within the bulk. These charged species subsequently migrate through the dielectric before becoming trapped at specific sites within the material. The net result of these processes is that the local field at particular sites within the insulation may be substantially different from that which would be experienced in the absence of such phenomena. In particular, the local field may greatly exceed that the threshold stress above which the degradation takes place, so causing accelerated electrical ageing of the material and eventual failure. Whilst this may occur through the action of both ac and dc fields, space charge is intrinsically more problematical under dc conditions. The development of polymer-insulated dc cables therefore represents a particularly challenging technological problem. Consequently, recently research into space charge formation and its effect on the ageing and failure mechanisms of insulating materials has intensified, not only because of its engineering importance, but also through technical advances made in instrumentation.

Attempts have been made to investigate the electric field distribution in polymeric power cables under dc conditions. Previous attempts were less significant as little knowledge on space charge distribution in the cable. Cable space charge measurement system has been set up in the High Voltage Lab and electric field in the presence of space charge has been estimated using empirical formula. This unique cable space charge measurement system enables us to investigate space charge distribution as a function of electric field, temperature and even polarity reversal, an operation often used in dc power transmission. However, for a practical dc power cable the electric field is affected by conductivity of the material which is a function of both temperature and electric field. The coupled problems impose significant difficulty to know electric field distribution in high voltage dc power cables therefore a serious thread to the reliable operation of dc power cables.

The project concerns the accurate determination of electric field distribution in the presence of space charge where electrical conductivity of the material will be determined as a function of both electric field and temperature. The coupled equations will be solved using a numerical software package. An algorithm will be produced so that the future experimental data can be loaded and electric field distribution is ready to be displayed.

Primary investigator

• George Chen

Secondary investigator

• ctc05r

Associated research groups

• Electrical Power Engineering
• Electronics and Electrical Engineering

Date:

2006-2010

Themes:

Modelling and Simulation, Space and surface charge, Environmental modelling

To date, there have been a number of attempts in simulating surface discharge. These works generally fall into one of the two categories: stochastic or deterministic. Stochastic techniques are able to produce discharge figures that have fractal characteristics but do not take into consideration any of the physical processes involved in the discharge phenomenon. Deterministic approaches, on the other hand, take ionisation, attachment, recombination, photo-ionisation and photo-emission processes into account. This project, therefore, pursues a deterministic scheme which is characterised by a set of partial differential continuity equations coupled with the Poisson’s equation. These equations govern the evolution of charged particles along the surface streamer channel. Due to the non-linearity and sharp gradient nature of the problem at hand, an accurate numerical method is required. Various numerical techniques have been compared including the Eulerian differencing, Lax-Wendroff and the Flux-Corrected-Transport (FCT) algorithm. The FCT method has shown superiority owning to its accuracy, stability and non‑negativity. The principle of the method is based on the flux limitation process which makes the best out of the low and high order schemes without introducing either diffusion or spurious oscillation. Possion’s equation, on the other hand, can be solved using the disc method or 3-D finite-difference method depending on the accuracy desired. From simulated results, one can obtain the streamer velocity, charged particle densities and electric field along the streamer channel. In addition, the discharge figure can be achieved by considering the growth of the future streamer in the direction of the maximum field induced from the pre‑existing streamers. By using a different set of swarm parameters, it is also possible to simulate surface discharge in SF6 gas.

Primary investigators

• Paul Lewin
• Igor Golosnoy

Secondary investigator

• ntt05r

Associated research groups

• Electrical Power Engineering
• Electronics and Electrical Engineering