Elevated Source/ Drain MOSFET Devices.
As MOS devices are scaled into the sub 70nm region, traditional source/drain engineering techniques can no longer suppress short channel effects while at the same time achieving low access resistances.
The elevated source/drain structure, created by growing selective epitaxial silicon in the source and drain regions, is a device concept that has been shown to lower access resistances while at the same time improving short channel performance.
The aim of this theme of the Euraccess project is to fabricate novel ESD MOSFETs with silicon germanium elevated source / drain structures both by growth of epitaxial silicon germanium and the synthesis of silicon germanium by Ge implantation into selective epitaxial silicon.
The UK Research Programme concerned with developing SiGe MOS technologies.
Funded pricipally by the EPSRC, 13 research teams from 9 UK universities work together on the programme along with industrial partners Avant!, Daimler- Chrysler, Infineon Technologies and Zarlink Semiconductor.
The project is concerned with the integration of strained silicon and silicon germanium layers in decananometre CMOS processes, with both conventional doped polysilicon gate and metal replacement gate processes. Work is also focused on limited area growth SiGe for virtual substrate strained silicon devices and the integration of a high-k gate dielectric into a SiGe MOS process.
Motivation: The past years have seen dramatic growth in the application of model checking techniques to the validation and verification of hardware systems. However, despite the success of model checking, most systems must be substantially simplified (i.e., abstracted) and considerable human ingenuity is still required. Furthermore, most software systems cannot be modelled directly by a finite state system: as soon as some kind of recursion, dynamic or unbounded data structures come into play, an infinite number of states must be verified.
Description The main objective of the project is to study the potential of automatically deriving abstractions for infinite model checking through a combination of existing technology for the automatic control of partial evaluation and abstract interpretation. First successful experiments of this idea have been conducted using the ECCE and LOGEN tools.
The project consists of a theoretical study coupled with the implementation of a combined partial evaluation and abstract interpretation system (based upon ECCE). The practicality of the approach will be gauged on realistic examples, some of them coming from the EPSRC funded ABCD projet for the validation of business-critical systems.
During powder handling powder particles collide with each other and with boundary walls and so charge. Particles are found to charge in a bipolar fashion, ie some particles are charged positively, some negatively and some hardly at all. We are investigating fundamental reasons for bipolar charging and are attempting to control it.
A compact electrostatic coalescer which enables the online separation of water from crude oils has been developed. Fundamentals of the coalescence process as functions of various parameters such as excitation frequency, voltage, oil flow rate, etc are studied.
This project is concerned with methods of developing high-integrity solutions to enterprise-level problems. The results will be integrated with the tools and techniques being developed at IBM UK Laboratories for e-business solutions built on Enterprise Java Beans.
The objective of this programme is:
1. to increase the uptake of formal modelling in the business critical systems industry. We plan to achieve this by:
2. lowering the cost of entry and 3. increasing the benefits of using formal modelling. We will be able to:
4. lower the cost by building a repository of generic models of systems and components; 5. increase the benefits by making verification and validation of critical systems available to real system architects; 6. lower the cost and increase the benefits by providing automated tool support. The focus is on support of system definition and architectural design so that the systems integrator can more easily model systems and validate proposed system architectures
The objective of PUSSEE is to introduce the formal proof of system properties throughout a modular system design methodology that integrates sub-systems co-verification with system refinement and reusability of virtual system components. This will be done by combining the UML and B languages to allow the verification of system specifications through the composition of proven sub-systems (in particular interfaces, using the VSIA/SLIF standard). The link of B with C, VHDL and SystemC will extend the correct-by-construction design process to lower system-on-chip (SoC) development stages. Prototype tools will be developed for the code generation from UML and B, and existing B verification tools will be extended to support IP reuse, according to the VSI Alliance work. The methodology and tools will be validated through the development of three industrial applications: a wireless mobile terminal, an IP encryption module for secure data transmission through internet and a network management module for automobiles.
The MATISSE project is developing industrial strength methodologies and associated technologies for the engineering of software-based critical systems. These methodologies and technologies will support industry in providing essential services for the information society of the Third Millennium that are highly dependable. The work programme is based on three major industrial case studies representing a spectrum of the essential services for the information society :- an embedded verifier for a smartcard system; a railway signalling and control system and a diagnostic system for healthcare clinicians and researchers. MATISSE will provide :- guidelines that allow formal methods to be integrated into existing systems engineering lifecycles so that higher degrees of safety and reliability can be achieved; methodologies that expand the range of application of these formal methods and enhancements to technologies associated with these formal methods.