- Date:
- 2013-2014
- Themes:
- Quantum Electronics and Spintronics, Nanoelectronics
- Funding:
- EPSRC (EP/K503770/1), Industrial
Single electron transistors (SET) are indispensible devices for quantum information processing and our Si based SETs have several advantages like high integration densities, low cost, and long spin decoherence time. We will further develop the technologies towards the practical implementation to the industry by optimising the fabrication process technologies in Southampton Nanofabrication Centre and examining them in the world leading low temperature measurement facilities. Especially, we will develop Si based SETs defined by the atomically flat interfaces to achieve the robust design capabilities against the interfacial defects and surface roughness, which are important for scalabilities and mass production.
Primary investigator
Secondary investigator
- mkh
Partner
- Hitachi Cambridge Laboratory
Associated research group
- Nano Research Group
- Date:
- 2010-2014
- Theme:
- MEMs and NEMs
- Funding:
- DOST Philippines
Thermoelectric generators (TEGs) are devices that convert heat into electricity. They are very attractive energy harvesters because they are highly reliable and environment-friendly. The efficiency of thermoelectric generators depends on the temperature gradient across the device, the average temperature of operation, and on the thermoelectric properties of the material. Most work on improving the TEG efficiency deals with improving the thermoelectric properties of the material. In this work, we propose a method of improving the efficiency of the TEG by increasing the temperature gradient across the device. To accomplish this, a lens can be used to concentrate solar radiation on the membrane of the TEG. By focusing solar radiation, the input heat flux increases; the temperature gradient across the device also increases; and the efficiency of the TEG improves as well.
Associated research group
- Nano Research Group
- Date:
- 2011-2018
- Theme:
- Nanoelectronics
- Funding:
- EPSRC Case Scheme
Many industries heavily rely upon advances in electronic devices. As development of electronics continues, new structures and new materials are being utilised. The reliability of these new technologies therefore need to meet the same high levels as the traditional technologies that they are replacing.
Industries such as space and nuclear in particular, face an additional challenge affecting the reliability of their electrical devices; radiation. Ionizing radiation in particular can damage dielectric layers in devices such as metal-oxide-semiconductor (MOS) transistors and resistive memories. In either case, controlling the radiation effects of dielectrics is essential for the reliability of these devices.
High-k MOS capacitors have been fabricated, analysed and irradiated. TiN/HfOx/Si structures in particular showed superior properties in comparison with silicon dioxide stacks, including high capacitance with low leakage. The ionizing radiation results indicate the high-k metal gate structures are just as radiation hard as the silicon dioxide structures. This verifies the high-k metal gate structures can be used as a replacement for silicon dioxide gate oxides, enabling the scaling limit in CMOS industry to be overcome.
A variety of resistive memory cells are fabricated whereby the effects of the interfacial layers, electrodes and insulator are investigated. Electrochemical metallization memory cells switching kinetics are investigated whereby the switching mechanism is analysed. VCM and ECM radiation responses are also investigated.
Primary investigators
- Kees De Groot
- Liudi Jiang (Engineering)
- Katrina Morgan
- Junqing Fan
- Ruomeng Huang
Secondary investigator
- Fully funded PhD scholarship (2017-2021) available for UK nationals !
Associated research groups
- Nano Research Group
- Southampton Nanofabrication Centre
- Date:
- 2013-2016
- Themes:
- Channel coding, Wireless Sensing and Sensor Networks, Communication and Networking
- Funding:
- Altera
Low Density Parity Check (LDPC) error correction codes have found application in numerous standards for both wired and wireless communication, including those for home networking, Local Area Networking (LAN), cellular systems, wireless LAN and Digital Video Broadcasting (DVB). LDPC codes enjoy near-optimal error correction performance, which facilitates communication throughputs that approach the capacity of the channel and meet the ever-increasing consumer demand for high-speed data. However, in order to realise these high communication throughputs, the LDPC encoder and decoder must have correspondingly-high processing throughputs. In order to facilitate the rapid prototyping of high-speed communication systems, there is a need for Field Programmable Gate Array (FPGA) realisations of LDPC decoders having high processing throughputs. While a throughput of 16.2 Gbps has already been achieved by the current state-of-the-art design, this is achieved by employing a fully-parallel architecture, which supports only a single LDPC matrix. Indeed, many more high-throughput FPGA LDPC architectures have been proposed in the literature, but each has its own drawbacks. These drawbacks may be manifested as relatively poor error correction performance, resource usage, energy consumption, latency, reconfigurability or LDPC matrix dimensions, for example. Hence, there is a need for generalised high-throughput FPGA architectures that can be configured to support not only various different LDPC matrices, but also various different trade-offs between the contradictory system characteristics listed above. Furthermore, there is a need for methodologies that allow the configuration of these architectures to be holistically designed, in order to readily achieve an appropriate trade-off between the characteristics. In this way, the resultant general purpose architectures would have significantly more applicability and commercial viability than existing high-throughput architectures.
Primary investigator
Secondary investigators
Partner
- Altera
Associated research groups
- Communications, Signal Processing and Control
- Pervasive Systems Centre
- Electronic and Software Systems
- Date:
- 2014-2017
- Themes:
- Channel coding, Communication and Networking, Wireless Sensing and Sensor Networks
- Funding:
- EPSRC (EP/L010550/1)
During the past two decades, reliable wireless communication at near-theoretical-limit transmission throughputs has been facilitated by receivers that operate on the basis of the Bahl-Cocke-Jelinek-Raviv (BCJR) algorithm. Most famously, this algorithm is employed for turbo error correction in the Long Term Evolution (LTE) standard for cellular telephony, as well as in its previous-generation predecessors. However, the transmission throughput of these standards is limited by the processing throughput of the turbo decoder. This limit may be attributed to the data dependencies of the BCJR algorithm, resulting in an inherently serial nature that cannot be readily mapped to processing architectures having a high degree of parallelism. Against this background, this project will redesign turbo decoder implementations at an algorithmic level, rather than only at the architectural level, which is the State-Of-the-Art (SOA) approach. More specifically, we have devised an alternative to the BCJR algorithm, which has the same error correction capability, but does not have any data dependencies. Owing to this, our algorithm can be mapped to highly-parallel many-core processing architectures, facilitating an LTE turbo decoder processing throughput that is several times higher than the SOA, satisfying future demands for gigabit throughputs. In collaboration with ARM, Altera and BT, this research addresses key EPSRC priorities in the Information and Communication Technologies theme, including 'Many-core architectures and concurrency in distributed and embedded systems' and 'Towards an intelligent information infrastructure'.
Primary investigator
Secondary investigators
Partners
- Altera
- ARM
- BT
Associated research groups
- Pervasive Systems Centre
- Communications, Signal Processing and Control
- Electronic and Software Systems
- Date:
- 2008-2012
- Theme:
- Novel Sensors
- Funding:
- European Commission
Primary investigators
Secondary investigators
Partners
- IFTH
- DITF
- Klopman International Srl
Associated research group
- Electronics and Electrical Engineering
- Date:
- 2012-2013
- Themes:
- Nanoelectronics, Biomimetics, Biologically Inspired Computing and Robotics
- Funding:
- EPSRC
This project aspires to investigate memory mechanisms in emerging non-CMOS devices and to correlate these with the short-term dynamics of biological synapses. Nanoionic devices are nowadays regarded a promising solution for establishing next-generationââ¬â¢s memory elements, yet most of their impact is anticipated through the realization of bio-inspired systems and applications. While brain-inspired computing typically focuses on the long-term dynamics of the synapses, it was recently shown that short-term dynamics play an important role in enhancing neural information processing. To this end, we seek to realistically emulate dynamical synapses behaviour with volatile memory elements, towards developing fundamental blocks for establishing unconventional computational formalisms.
Primary investigator
Associated research groups
- Nano Research Group
- Southampton Nanofabrication Centre
- Date:
- 2013-2016
- Themes:
- Nanoelectronics, Bionanotechnology and Biosensors, Biologically Inspired Computing and Robotics
- Funding:
- European Commission
Information processing in classical ââ¬Ëvon Neumannââ¬â¢ architectures is less efficient compared to biological counterparts when dealing with ill-posed problems and noisy data. The reason is that the biological brain is configured differently and the key is its evolving structure, where connectivity elements between individual neurons, the synapses, undergo ââ¬Ëbirthââ¬â¢ and ââ¬Ëdeathââ¬â¢ as well as strengthening and weakening through a selection process, reconfiguring neuronal connectivity in a self-organizing manner and allowing the networked population of neuronal processors to adapt motor and behavioural responses to the ever changing environment. Artificial neural networks in the form of software run on conventional ââ¬Ëvon Neumannââ¬â¢ computers appear incomparable to the biological systems in terms of speed, energy efficiency, adaptability and robustness. The challenge is to propose a ââ¬Ëphysicalââ¬â¢ neural network where elements overcome this deficiency by merging data storage and processing into single electronic devices and by self-organizing and reconfiguring connectivity. Along this route, we aim to create a new biohybrid architecture of natural and artificial neurons endowed with plasticity properties. Communication between artificial and natural worlds will be established through new nano- and microtransducers allowing direct electrical interfacing of a network of neurons in culture to an artificial CMOS-based counterpart. Adaptation properties of the artificial network will rely on memristive nanoelectronic devices with synaptic-like plasticity and on activity-dependent rearrangement of neuronal connectivity. As such, the biohybrid system will provide new and unique adaptive, self-organizing and evolving properties deriving from the fusion of natural and artificial neuronal elements into a new plastic entity and will represent a fundamental step towards the development of novel brain-inspired computing architectures as well as ââ¬Ëintelligentââ¬â¢ autonomous systems and prostheses.
Primary investigator
Associated research groups
- Nano Research Group
- Southampton Nanofabrication Centre
- Date:
- 2013-2018
- Themes:
- Nanoelectronics, Biomimetics, Biologically Inspired Computing and Robotics
- Funding:
- EPSRC (EP/K017829/1)
Nanoscale resistive switching (RS) elements, also known as memristors, are nowadays regarded as a promising solution for establishing next-generation memory, due to their infinitesimal dimensions, their capacity to store multiple bits of information per element and the miniscule energy required to write distinct states. Currently, the microelectronics community aspires exploiting these attributes in a deterministic fashion where information encoding and processing is realised via static representations. In consequence, research efforts are focused on optimising memristor technology in a "More Moore" approach to comply with existing CMOS devices attributes, i.e. high-yield, supreme reproducibility, very long retention characteristics and conventional circuit design formalisms. The functional properties of such elements are however associated with irreversible rate-limiting electro/thermo-dynamic changes that often bring them in "far from equilibrium" conditions, manifesting opportunities for unconventional computing within a probabilistic framework.
This fellowship aims exploiting the strong emergence of ultra-thin functional oxides, nanoscale resistive switching elements and large-scale systems of the same. We will first investigate the effect of quantum phase transitions and the mechanisms leading into thermodynamically stable/unstable long-range order/disorder of distinct materials. These mechanisms will then be exploited in nanoscale solid-state devices for establishing the state-of-the-art in non-volatile multi-state memory but also volatile elements that could potentially be employed as dynamic computational elements. The rich-dynamics of the later will be compared against reaction-diffusion mechanisms of naturally occurring nano-systems to facilitate novel design paradigms and emerging ICT applications for substantiating unconventional computation formalisms. A successful outcome will demonstrate a mature memristive device manufacturing technology that will be supported by the necessary design tools, for taking CMOS technology far beyond its current state-of-art.
Primary investigator
Secondary investigators
- ak1a12
- Spyridon Stathopoulos
- dc1e13
Associated research groups
- Nano Research Group
- Southampton Nanofabrication Centre
- Date:
- 2011-2014
- Themes:
- Nanoelectronics, Biomimetics, Biologically Inspired Computing and Robotics
- Funding:
- EPSRC (EP/J00801X/1)
During the past two decades, philosophers, psychologists, cognitive scientists, clinicians and neuroscientists strived to provide authoritative definitions of consciousness within a neurobiological framework. Engineers have more recently joined this quest by developing neuromorphic VLSI circuits for emulating biological functions. Yet, to date artificial systems have not been able to faithfully recreate natural attributes such as true processing locality (memory and computation) and complexity (10^10 synapses per cm2), preventing the achievement of a long-term goal: the creation of autonomous cognitive systems.
This project aspires to develop experimental platforms capable of perceiving, learning and adapting to stimuli by leveraging on the latest developments of five leading European institutions in neuroscience, nanotechnology, modeling and circuit design. The non-linear dynamics as well as the plasticity of the newly discovered memristor are shown to support Spike-based- and Spike-Timing-Dependent-Plasticity (STDP), making this extremely compact device an excellent candidate for realizing large-scale self-adaptive circuits; a step towards "autonomous cognitive systems". The intrinsic properties of real neurons and synapses as well as their organization in forming neural circuits will be exploited for optimising CMOS-based neurons, memristive grids and the integration of the two into realtime biophysically realistic neuromorphic systems. Finally, the platforms would be tested with conventional as well as abstract methods to evaluate the technology and its autonomous capacity.
Primary investigator
Associated research groups
- Nano Research Group
- Southampton Nanofabrication Centre